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ICS844003I bảng dữ liệu(PDF) 9 Page - Integrated Circuit Systems |
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ICS844003I bảng dữ liệu(HTML) 9 Page - Integrated Circuit Systems |
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9 / 13 page ![]() 844003AGI www.icst.com/products/hiperclocks.html REV. B AUGUST 25, 2005 9 Integrated Circuit Systems, Inc. ICS844003I FEMTOCLOCKS™CRYSTAL-TO-LVDS FREQUENCY SYNTHESIZER PRELIMINARY APPLICATION INFORMATION CRYSTAL INPUT INTERFACE The ICS844003I has been characterized with 18pF parallel resonant crystals. The capacitor values shown in Figure 3 below Figure 3. CRYSTAL INPUt INTERFACE were determined using a 31.25MHz or 26.041666MHz 18pF paral- lel resonant crystal and were chosen to minimize the ppm error. ICS844003I POWER SUPPLY FILTERING TECHNIQUES As in any high speed analog circuitry, the power supply pins are vulnerable to random noise. The ICS844003I provides separate power supplies to isolate any high switching noise from the outputs to the internal PLL. V DD, VDDA, and VDDOx should be individually connected to the power supply plane through vias, and bypass capacitors should be used for each pin. To achieve optimum jitter performance, power supply isolation is required. Figure 2 illustrates how a 10 Ω resistor along with a 10μF and a .01μF bypass capacitor should be connected to each V DDA pin. The 10Ω resistor can also be replaced by a ferrite bead. FIGURE 2. POWER SUPPLY FILTERING 10 Ω V DDA 10 μF .01 μF 3.3V .01 μF V DD C1 22p X1 18pF Parallel Crystal C2 22p XTAL_OUT XTAL_IN |
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