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ICS844003AI01 bảng dữ liệu(PDF) 10 Page - Integrated Circuit Systems |
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ICS844003AI01 bảng dữ liệu(HTML) 10 Page - Integrated Circuit Systems |
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10 / 12 page ![]() 844003AGI-01 www.icst.com/products/hiperclocks.html REV. A MAY 31, 2005 10 Integrated Circuit Systems, Inc. ICS844003I-01 FEMTOCLOCKS™CRYSTAL-TO-LVDS FREQUENCY SYNTHESIZER PRELIMINARY 3.3V LVDS DRIVER TERMINATION A general LVDS interface is shown in Figure 4. In a 100 Ω differential transmission line environment, LVDS drivers require a matched load termination of 100 Ω across near FIGURE 4. TYPICAL LVDS DRIVER TERMINATION the receiver input. For a multiple LVDS outputs buffer, if only partial outputs are used, it is recommended to terminate the unused outputs. RELIABILITY INFORMATION TRANSISTOR COUNT The transistor count for ICS844003I-01 is: 3537 TABLE 7. θ JA VS . AIR FLOW TABLE FOR 24 LEAD TSSOP θθθθθ JA by Velocity (Meters per Second) 0 1 2.5 Multi-Layer PCB, JEDEC Standard Test Boards 70°C/W 65°C/W 62°C/W R1 100 3.3V 100 Ohm Differential Transmission Line 3.3V + - LVDS |
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