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TBD bảng dữ liệu(PDF) 6 Page - Integrated Circuit Systems |
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TBD bảng dữ liệu(HTML) 6 Page - Integrated Circuit Systems |
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6 / 11 page ![]() 843011CG www.icst.com/products/hiperclocks.html REV. A JANUARY 25, 2006 6 Integrated Circuit Systems, Inc. ICS843011C FEMTOCLOCKS™ CRYSTAL-TO- 3.3V LVPECL CLOCK GENERATOR PRELIMINARY APPLICATION SCHEMATIC Figure 3A shows a schematic example of the ICS843011C. An example of LVEPCL termination is shown in this sche- matic. Additional LVPECL termination approaches are shown in the LVPECL Termination Application Note. In this example, an 18 pF parallel resonant 26.5625MHz crystal is used for generating 106.25MHz output frequency. The C1 = 27pF and C2 = 33pF are recommended for frequency accuracy. For different board layout, the C1 and C2 values may be slightly adjusted for optimizing frequency accuracy. FIGURE 3A. ICS843011C SCHEMATIC EXAMPLE FIGURE 3B. ICS843011 PC BOARD LAYOUT EXAMPLE PC BOARD LAYOUT EXAMPLE Figure 3B shows an example of ICS843011C P.C. board lay- out. The crystal X1 footprint shown in this example allows installation of either surface mount HC49S or through-hole HC49 package. The footprints of other components in this example are listed in the Table 6. There should be at least one decoupling capacitor per power pin. The decoupling capaci- tors should be located as close as possible to the power pins. The layout assumes that the board has clean analog power ground plane. TABLE 6. FOOTPRINT TABLE e c n e r e f e Re z i S 2 C , 1 C2 0 4 0 3 C5 0 8 0 5 C , 4 C3 0 6 0 2 R3 0 6 0 t n e n o p m o c s t s il , 6 e l b a T : E T O N . e l p m a x e t u o y a l s i h t n i n w o h s s e z i s R5 50 Zo = 50 Ohm C4 0.1u C2 33pF XTAL_IN Q nQ 18pF VCCA R5 133 R2 10 Zo = 50 Ohm C5 0.1u R6 50 Zo = 50 Ohm R4 82.5 + - Optional Y-Termination Q XTAL_OUT X1 26.5625MHz Zo = 50 Ohm nQ VCC VCC C1 27pF + - R7 50 U2 843011C 1 2 3 4 8 7 6 5 VCCA VEE XTAL_OUT XTAL_IN VCC Q nQ nc R6 82.5 C3 10uF VCC R3 133 |
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