ICS843022 datasheet(8/13 Pages) ICST

8 / 13 page

843022AG

www.icst.com/products/hiperclocks.html

REV. A NOVEMBER 30, 2004

Integrated

Circuit

Systems, Inc.

ICS843022

FEMTOCLOCKS™CRYSTAL-TO-

3.3V LVPECL CLOCK GENERATOR

PRELIMINARY

APPLICATION SCHEMATIC

Figure 3A shows a schematic example of the ICS843022. An

example of LVEPCL termination is shown in this schematic.

Additional LVPECL termination approaches are shown in the

LVPECL Termination Application Note. In this example, an 18pF

parallel resonant 25MHz crystal is used for generating 125MHz

output frequency. The C1 = 27pF and C2 = 33pF are recom-

mended for frequency accuracy. For different board layout, the

C1 and C2 values may be slightly adjusted for optimizing fre-

quency accuracy.

FIGURE 3A. ICS843022 SCHEMATIC EXAMPLE

PC BOARD LAYOUT EXAMPLE

Figure 3B shows an example of P.C. board layout. The crystal

X1 footprint in this example allows either surface mount (HC49S)

or through hole (HC49) package. C3 is 0805. C1 and C2 are

0402. Other resistors and capacitors are 0603. This layout as-

sumes that the board has clean analog power and ground planes.

FIGURE 3B. ICS843022 PC BOARD LAYOUT EXAMPLE

Zo = 50 Ohm

VCC

27pF

VCC

82.5

25MHz

VCC

ICS843022

VCCA

VEE

XTAL2

XTAL1

VCC

nQ0

FREQ_SEL

82.5

33pF

0.1u

10uF

XTAL1

VCC

0.1u

Zo = 50 Ohm

XTAL2

VCCA

133

18pF

133

XTAL_OUT

XTAL_IN

XTAL_OUT

XTAL_IN

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