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ICS667-01 bảng dữ liệu(PDF) 1 Page - Integrated Circuit Systems |
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ICS667-01 bảng dữ liệu(HTML) 1 Page - Integrated Circuit Systems |
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1 / 5 page ![]() ICS667-01 MDS 667-01 C 1 Revision 031605 In tegr ated Ci rcui t Syst em s 525 Race Street San Jose, CA 95126 t e l (4 08) 297-1201 www. icst.com HDTV CLOCK SYNTHESIZER Description The ICS667-01 is a low-cost, low jitter, high-performance PLL clock synthesizer designed to produce the 74.176 MHz clock necessary for HDTV systems. Using ICS’ patented analog Phase-Locked Loop (PLL) techniques, the device accepts a 27 MHz crystal or clock input. The zero ppm synthesis error exactly locks the display to the digital stream. ICS manufactures the largest variety multimedia clock synthesizers for all applications. Consult ICS to eliminate crystals and oscillators from your board. Features • Packaged in 8-pin SOIC • Available in Pb (lead) free package • Input frequency of 27 MHz • Zero ppm synthesis error in output clock • 3.3 V ±5% operating supply • Ideal for HDTV applications and oscillator manufacturers • Advanced, low power, sub-micron CMOS process Block Diagram CLK 74.17582418 MHz Clock Synthesis and Control Circuitry 27 MHz crystal or clock input VDD Clock Buffer OE ICLK/X1 X2 27.0000 MHz GND 2 Optional tuning crystal capacitors |
Số phần tương tự - ICS667-01 |
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Mô tả tương tự - ICS667-01 |
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