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211AI01L bảng dữ liệu(PDF) 1 Page - Integrated Circuit Systems |
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211AI01L bảng dữ liệu(HTML) 1 Page - Integrated Circuit Systems |
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1 / 13 page ![]() 85211AMI-01 www.icst.com/products/hiperclocks.html REV. A NOVEMBER 1, 2005 1 Integrated Circuit Systems, Inc. ICS85211I-01 LOW SKEW, 1-TO-2 DIFFERENTIAL-TO-HSTL FANOUT BUFFER BLOCK DIAGRAM PIN ASSIGNMENT GENERAL DESCRIPTION The ICS85211I-01 is a low skew, high perfor- mance 1-to-2 Differential-to-HSTL Fanout Buffer and a member of the HiPerClockS™ family of High Performance Clock Solutions from ICS. The CLK, nCLK pair can accept most standard differential input levels.The ICS85211I-01 is characterized to operate from a 3.3V power supply. Guaranteed output and par t-to-part skew characteristics make the ICS85211I-01 ideal for those clock distribution applications demanding well defined perfor mance and repeatability. For optimal performance, terminate all outputs. FEATURES • Two differential HSTL compatible outputs • One differential CLK, nCLK input pair • CLK, nCLK pair can accept the following differential input levels: LVDS, LVPECL, HSTL, SSTL, HCSL • Maximum output frequency: 700MHz • Translates any single-ended input signal to HSTL levels with resistor bias on nCLK input • Output skew: 30ps (maximum) • Part-to-part skew: 250ps (maximum) • Propagation delay: 1ns (maximum) • Output crossover Voltage: 0.68V to 0.9V • Output duty cycle: 49% - 51% up to 266.6MHz • V OH = 1.4V (maximum) • 3.3V operating supply • -40°C to 85°C ambient operating temperature • Available in both standard and lead-free RoHS-compliant packages HiPerClockS™ ICS ICS85211I-01 8-Lead SOIC 3.90mm x 4.90mm x 1.37mm package body M Package Top View Q0 nQ0 Q1 nQ1 1 2 3 4 VDD CLK nCLK GND 8 7 6 5 Q0 nQ0 Q1 nQ1 CLK nCLK |
Số phần tương tự - 211AI01L |
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Mô tả tương tự - 211AI01L |
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