ICS85211AMIT datasheet(5/12 Pages) ICST

5 / 12 page

85211AMI

www.icst.com/products/hiperclocks.html

REV. B ARPIL 8, 2003

Integrated

Circuit

Systems, Inc.

ICS85211I

LOW SKEW, 1-TO-2

DIFFERENTIAL-TO-LVHSTL FANOUT BUFFER

SCHEMATIC EXAMPLE

Figure 2 shows a schematic example of ICS85211I. In this

example, the input is driven by an ICS HiPerClockS LVHSTL

driver. The decoupling capacitors should be physically located

FIGURE 2. ICS85211I LVHSTL BUFFER SCHEMATIC EXAMPLE

near the power pin. For ICS85211I, the unused outputs need

to be terminated.

APPLICATION INFORMATION

Figure 1 shows how the differential input can be wired to accept

single ended levels. The reference voltage V_REF = V

DD/2 is

generated by the bias resistors R1, R2 and C1. This bias circuit

should be located as close as possible to the input pin. The ratio

FIGURE 1. SINGLE ENDED SIGNAL DRIVING DIFFERENTIAL INPUT

of R1 and R2 might need to be adjusted to position the V_REF in

the center of the input voltage swing. For example, if the input

clock swing is only 2.5V and V

DD = 3.3V, V_REF should be 1.25V

and R2/R1 = 0.609.

WIRING THE DIFFERENTIAL INPUT TO ACCEPT SINGLE ENDED LEVELS

VDD=3.3V

ICS

Unused

Output

Need To

Terminated

Zo = 50 Ohm

0.1u

1.8V

HiPerClockS

LVHSTL Input

Zo = 50 Ohm

LVHSTL

Zo = 50 Ohm

LVHSTL Driv er

ICS85211

nQ0

nQ1

VDD

CLK

nCLK

GND

V_REF

0.1u

Single Ended Clock Input

CLK

nCLK

VDD

ICS85211AMIT bảng dữ liệu(PDF) 5 Page - Integrated Circuit Systems

ICS85211AMIT bảng dữ liệu(HTML) 5 Page - Integrated Circuit Systems

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12

bảng dữ liệu tải về

Link URL