ICS840002 datasheet(10/12 Pages) ICST

10 / 12 page

Integrated

Circuit

Systems, Inc.

840002AGI

www.icst.com/products/hiperclocks.html

REV. A MARCH 10, 2005

ICS840002I

FEMTOCLOCKS™CRYSTAL-TO-

LVCMOS/LVTTL FREQUENCY SYNTHESIZER

LAYOUT GUIDELINE

Figure 3 shows a schematic example of the ICS840002I. An

example of LVCMOS termination is shown in this schematic.

Additional LVCMOS termination approaches are shown in the

LVCMOS Termination Application Note. In this example, an 18

pF parallel resonant 26.5625MHz crystal is used. The C1=22pF

FIGURE 3. ICS840002I SCHEMATIC EXAMPLE

and C2=22pF are recommended for frequency accuracy. For

different board layout, the C1 and C2 may be slightly adjusted

for optimizing frequency accuracy. 1K

Ω pullup or pulldown re-

sistors can be used for the logic control input pins.

XTAL1

Optional Termination

RD1

Not Install

RU1

VDD

0.01u

If not using the crystal input, it can be left floating.

For additional protection the XTAL_IN pin can be

tied to ground.

Zo = 50 Ohm

LVCMOS

Set Logic

Input to

'0'

Unused output can be left floating. There should

no trace attached to unused output. Device

characterized with all outputs terminated.

100

To Logic

Input

pins

Set Logic

Input to

'1'

Logic Control Input Examples

0.1u

VDDA

22pF

To Logic

Input

pins

Zo = 50 Ohm

VDD

RD2

0.1u

10uF

VDD

100

VDD

LVCMOS

XTAL2

ICS840002i

FSEL0

XTAL_SEL

TEST_CLK

nPLL_SEL

VDDA

VDD

XTAL_OUT

XTAL_IN

VDDO

GND

FSEL1

RU2

Not Install

VDD

22pF

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