công cụ tìm kiếm bảng dữ liệu linh kiện điện tử
  Vietnamese  ▼
ALLDATASHEET.VN

X  

ICS84329BVT bảng dữ liệu(PDF) 12 Page - Integrated Circuit Systems

tên linh kiện ICS84329BVT
Giải thích chi tiết về linh kiện  700MHZ, LOW JITTER, CRYSTAL-TO-3.3V DIFFERENTIAL LVPECL FREQUENCY SYNTHESIZER
PDF  19 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
nhà sản xuất  ICST [Integrated Circuit Systems]
Trang chủ  http://www.icst.com
Logo ICST - Integrated Circuit Systems

ICS84329BVT bảng dữ liệu(HTML) 12 Page - Integrated Circuit Systems

Back Button ICS84329BVT Datasheet HTML 8Page - Integrated Circuit Systems ICS84329BVT Datasheet HTML 9Page - Integrated Circuit Systems ICS84329BVT Datasheet HTML 10Page - Integrated Circuit Systems ICS84329BVT Datasheet HTML 11Page - Integrated Circuit Systems ICS84329BVT Datasheet HTML 12Page - Integrated Circuit Systems ICS84329BVT Datasheet HTML 13Page - Integrated Circuit Systems ICS84329BVT Datasheet HTML 14Page - Integrated Circuit Systems ICS84329BVT Datasheet HTML 15Page - Integrated Circuit Systems ICS84329BVT Datasheet HTML 16Page - Integrated Circuit Systems Next Button
Zoom Inzoom in Zoom Outzoom out
 12 / 19 page
background image
84329BV
www.icst.com/products/hiperclocks.html
REV. B JANUARY 18, 2006
12
Integrated
Circuit
Systems, Inc.
ICS84329B
700MHZ, LOW JITTER, CRYSTAL-TO-3.3V
DIFFERENTIAL LVPECL FREQUENCY SYNTHESIZER
V
CC - 2V
50
Ω
50
Ω
RTT
Z
o = 50Ω
Z
o = 50Ω
FOUT
FIN
RTT =
Z
o
1
((V
OH + VOL) / (VCC – 2)) – 2
3.3V
125
Ω
125
Ω
84
Ω
84
Ω
Z
o = 50Ω
Z
o = 50Ω
FOUT
FIN
The clock layout topology shown below is a typical termina-
tion for LVPECL outputs. The two different layouts mentioned
are recommended only as guidelines.
FOUT and nFOUT are low impedance follower outputs that
generate ECL/LVPECL compatible outputs. Therefore, ter-
minating resistors (DC current path to ground) or current
sources must be used for functionality. These outputs are
FIGURE 6B. LVPECL OUTPUT TERMINATION
FIGURE 6A. LVPECL OUTPUT TERMINATION
designed to drive 50
Ω transmission lines. Matched imped-
ance techniques should be used to maximize operating
frequency and minmize signal distortion. Figures 6A and
6B show two different layouts which are recommended only
as guidelines.Other suitable clock layouts may exist and it
would be recommended that the board designers simulate
to guarantee compatibility across all printed circuit and clock
component process variations.
TERMINATION FOR LVPECL OUTPUTS



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19


bảng dữ liệu tải về

Go To PDF Page


Link URL



Cho đến nay ALLDATASHEET có giúp ích cho doanh nghiệp của bạn hay không?  [ DONATE ] 

Alldatasheet là   |   Quảng cáo   |   Liên lạc với chúng tôi   |   Chính sách bảo mật   |   Liên kết đến bảng dữ liệu    |   Trao đổi link   |   Tìm kiếm theo nhà sản xuất
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com