ICS8516I datasheet(10/13 Pages) ICST

10 / 13 page

8516FYI

www.icst.com/products/hiperclocks.html

REV. A JULY 30, 2004

Integrated

Circuit

Systems, Inc.

ICS8516I

LOW SKEW, 1-TO-16

DIFFERENTIAL-TO-LVDS CLOCK DISTRIBUTION CHIP

RELIABILITY INFORMATION

TRANSISTOR COUNT

The transistor count for ICS8516I is: 1821

TABLE 6.

. AIR FLOW TABLE FOR 48 LEAD LQFP

θθθθθ

JA by Velocity (Linear Feet per Minute)

200

500

Single-Layer PCB, JEDEC Standard Test Boards

67.8°C/W

55.9°C/W

50.1°C/W

Multi-Layer PCB, JEDEC Standard Test Boards

47.9°C/W

42.1°C/W

39.4°C/W

NOTE: Most modern PCB designs use multi-layered boards. The data in the second row pertains to most designs.

FIGURE 4. ICS8516I LVDS BUFFER SCHEMATIC EXAMPLE

0.1u

(U1-12)

Zo = 50 Ohm

(U1-25)

LVDS_input

(U1-31)

Zo = 50 Ohm

0.1u

8516

nQ1

nQ0

GND

nCLK

CLK

GND

Q15

nQ15

Q14

nQ14

nQ6

nQ7

GND

OE1

OE2

GND

nQ8

nQ9

Zo = 50 Ohm

R16

100

Zo = 50 Ohm

VDD=3.3V

LVDS_input

Zo = 50 Ohm

VDD=3.3V

R10

100

0.1u

LVDS_Driver

R17

100

LVDS_input

(U1-1)

Decoupling capacitors located near the power pins

(U1-6)

(U1-36)

100

0.1u

SCHEMATIC EXAMPLE

Figure 4 shows a schematic example of ICS8516I. In this ex-

ample, the input is driven by an LVDS driver. For LVDS buffer, it

is recommended to terminate the unused outputs for better sig-

nal integrity. The decoupling capacitors should be physically

located near the power pin.

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