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DA9217

High-Performance Dual-Phase DC-DC Converter

Datasheet

Revision 2.0

18-Sep-2020

CFR0011-120-00

21 of 48

4.2

Internal Circuits

4.2.1

IC_EN/Chip Enable/Disable

IC_EN is chip enable/disable control input. When IC_EN = 0, all blocks except for low IQ POR are

powered-down and buck output is pulled-down.

4.2.2

nIRQ/Interrupt

The interrupt triggers events. Trigger conditions and control registers for each interrupt event are

listed in Table 13.

Some of these events are categorized as fault events and affect device operation (for example, buck

disable), see Section 4.1.6.

Table 13: Interrupt List

Name

Polarity

(Note 1)

Trigger

IRQ Status

IRQ Mask

Deglitch

Period

Thermal

warning

(event)

TJ rising above TWARN

E_TEMP_WARN

M_TEMP_WARN

0 s

Thermal

critical

(event)

TJ rising above TCRIT

E_TEMP_CRIT

M_TEMP_CRIT

0 s

Buck1

power-good

(event)

Buck1 VOUT is in power-good

voltage range

(not under- or over-voltage)

E_PG1

M_PG1

0 s

Buck1

over-voltage

(event)

Buck1 VOUT rising above

over-voltage

threshold (target voltage +

150 mV)

E_OV1

M_OV1

Rise:8 µs

Fall:8 µs

Buck1

under-

voltage

(event)

Buck1 VOUT falling below

under-voltage

threshold (target voltage -

VTH_PG)

E_UV1

M_UV1

0 s

Buck1

over-current

(event)

Buck1 current rising above

over-current threshold

E_OC1

M_OC1

0 s

Buck1

power-good

(status)

(Note 2)

Buck1 VOUT is in power-good

voltage range

(not under- or over-voltage)

PG1

M_PG1_STAT

(Note 3)

0 s

Thermal

warning

(status)

(Note 2)

TJ rising above TWARN

TEMP_WARN

M_VR_HOT

(Note 3)

0 s

GPIO0

change

(event)

Detect GPIO0 change for

active trigger

selected GPIO0_TRIG

E_GPIO0

M_GPIO0

100 µs/

1 ms/

10 ms/

100 ms

GPIO1

change

(event)

Detect GPIO1 change for

active trigger

selected GPIO1_TRIG

E_GPIO1

M_GPIO1

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