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ADMV8420ACPZ-R5 bảng dữ liệu(PDF) 11 Page - Analog Devices |
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ADMV8420ACPZ-R5 bảng dữ liệu(HTML) 11 Page - Analog Devices |
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11 / 14 page ![]() Data Sheet ADMV8420 Rev. B | Page 11 of 14 APPLICATIONS INFORMATION TYPICAL APPLICATION CIRCUIT Figure 26 shows the typical application circuit for the ADMV8420. The RFIN and RFOUT pins are dc-coupled and external voltage must not be applied. It is recommended to install 100 pF series capacitors (C1 and C2) on the RF traces to prevent any prestage or poststage interaction with the filter. On the VFCTL control port, the C3 decoupling capacitor is shown with 100 pF as the typical value. However, the selection of the C3 capacitor is determined based on the system design criteria for phase noise and tuning speed. That is, there is a baseband noise characteristic for a particular control voltage, which can translate into additive phase noise within the filter. Minimizing baseband noise on the control voltage can be done by capacitive means at the expense of voltage rise time, which impacts the tuning speed of the filter. Carefully consider the control voltage baseband noise and rise time performance to ensure that system performance metrics are met. VFCTL C2 100pF C1 100pF C3 100pF RFOUT RFIN 2 1 3 4 5 6 18 17 16 15 14 13 ADMV8420 PACKAGE BASE GND Figure 26. Typical Application Circuit |
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