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ICS477R-05ILF bảng dữ liệu(PDF) 5 Page - Integrated Circuit Systems

tên linh kiện ICS477R-05ILF
Giải thích chi tiết về linh kiện  Quad PLL with VCXO for HDTV
PDF  7 Pages
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nhà sản xuất  ICST [Integrated Circuit Systems]
Trang chủ  http://www.icst.com
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ICS477R-05ILF bảng dữ liệu(HTML) 5 Page - Integrated Circuit Systems

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Quad PLL with VCXO for HDTV
MDS 477-05 H
5
Revision 062404
Integrated Circuit Systems, Inc.
● 525 Race Street, San Jose, CA 95126 ● tel (408) 297-1201 ● www.icst.com
ICS477-05
DC Electrical Characteristics
Unless stated otherwise, VDD = 3.3 V ±5%, Ambient Temperature -40 to +85
°C
AC Electrical Characteristics
Unless stated otherwise, VDD = 3.3 V ±5%, Ambient Temperature -40 to +85
° C
Note 1: Measured with a 15 pF load.
Note 2: With an ICS approved crystal.
Parameter
Symbol
Conditions
Min.
Typ.
Max.
Units
Operating Voltage
VDD
3.15
3.3
3.45
V
Supply Current
IDD
No load
48
mA
Power Down Current
IDDPD
No load
0.5
mA
Input High Voltage
VIH
PDTS pin
2
V
Input Low Voltage
VIL
PDTS pin
0.8
V
Output High Voltage
VOH
IOH = -4 mA
VDD-0.4
V
Output High Voltage
VOH
IOH = -12 mA
2.4
V
Output Low Voltage
VOL
IOL = 12 mA
0.4
V
Short Circuit Current
IOS
CLK output
±80
mA
Input Capacitance, inputs
CIN
5pF
Nominal Output Impedance
ZOUT
20
Ω
Internal Pull-up Resistor
RPUP
PDTS pin
360
k
Ω
Internal Pull-down Resistor
RPD
CLK outputs
510
k
Ω
Parameter
Symbol
Conditions
Min.
Typ.
Max.
Units
Input Frequency
fin
Crystal input, Note 2
27
MHz
Crystal Pullability
FP
0V< VIN < 3.3 V
±100
ppm
VCXO Gain
K0
VIN = VDD/2 + 1 V
150
ppm/V
Output Rise Time
tOR
20% to 80%, Note 1
1.2
ns
Output Fall Time
tOF
80% to 20%, Note 1
1.0
ns
Clock Stabilization Time after
Power-up
10
ms
Cycle Jitter (short term jitter)
tja
±200
ps
Long Term Jitter
54.054M, 54M clocks
1.0
ns
74.175M clock
1.3
ns
27M reference clock
300
ps
Output Enable Time
PDTS high to output
locked to ±1%
250
µs
Output Disable Time
PDTS low to tri-state
20
ns



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