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MLX90821 bảng dữ liệu(PDF) 18 Page - Melexis Microelectronic Systems |
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MLX90821 bảng dữ liệu(HTML) 18 Page - Melexis Microelectronic Systems |
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18 / 40 page ![]() MLX90821 Relative Pressure Sensor IC Page 18 of 40 REV 004 – 4 MAR 2021 3901090821 Analog Front End The analog front end of the MLX90821 consists of a chopping stage and 3 amplification stages as can be seen in Figure 9. There are also several input diagnostics integrated into this front end to be able to detect a broken InP or InN connection or an input which is out of range. This diagnostic information is transferred to the microcontroller to handle further action for example flagging a diagnostic message. OPA OPA G = 4.5 to 10.5 3 bits G = 1.6, 3.2 or 6.4 InP InN G = 1.25 or 3.5 CSOF: 1/3 to 2/3 of VDDA Stage 1: Instrumentation amplifier Stage 2: Differential amplifier Stage 3: Integrator Chopping 1us/phase Input Diag nostics Figure 9: Analog front end block diagram The first stage is an instrumentation amplifier of which the gain can be programmed using 3 bits to cover a gain range between 4.5 and 10.6. Transfer equation: OUTP1 – OUTN1 = Gst1*(InP – InN) in phase 1 OUTP1 – OUTN1 = Gst1*(InN – InP) in phase 2 The second stage is a fully differential amplifier. The gain of the amplifier can be calibrated using 1 bit. Transfer equation: OUTP2 – OUTN2 = -Gst2*(OUTP1 – OUTN1) – Gst2*(CSOF1 – CSOF2) in phase 1 OUTP2 – OUTN2 = -Gst2*(OUTN1 – OUTP1) – Gst2*(CSOF2 – CSOF1) in phase 2 The CSOF1 and CSOF2 signals are generated by the coarse offset DAC with the following transfer functions: ( ) 127 ] 0 : 6 [ * 2 * 3 1 3 2 * 1 2 1 7 CO VDDA VDDA CSOF CO − − + = ( ) 127 ] 0 : 6 [ * 2 * 3 1 3 2 * 1 2 2 7 CO VDDA VDDA CSOF CO − − − = CO[6:0] fixes the DAC output. CO7 is used for the polarity. The third stage is an integrator which is controlled using 2 bits to set a gain between 1.6 and 6.4 Transfer equation at the outputs of the amplifier: OUTP3 – OUTN3 = -N*(C1/C2)*(OUTP2 – OUTN2) OUTP3_common_mode and OUTN3_common_mode = VCM = VDDA/2 In this equation N represents the number of integration cycles which is a fixed value of N = 40. C2 is a fixed feedback capacitor of approximately 5pF. C1 can have 3 different values: 0.2pF, 0.4pF or 0.8pF. Transfer equation after the ADC: Pressure_ADC = ((OUTN3 – OUTP3)*216/VDDA) + 32768 |
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