TC9496AF datasheet(13/48 Pages) TOSHIBA

tên linh kiện	TC9496AF

Giải thích chi tiết về linh kiện	1 Chip Audio Digital Signal Processor

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13 / 48 page

TC9496AF

2002-01-11

2.2

C Bus Mode

When I2CS = H, data can be transmitted or received in I2C bus mode.

When the CS signal is Low, control from the microcontroller is enabled.

In I2C mode, the CS signal can be used fixed to L. The IFCK signal is the transmit/receive clock.

The IFDI signal is the data.

The TC9496AF loads the IFDI data on the IFCK signal rising edge.

When CS = H, IFCK and IFD signal are don’t care.

2.2.1 Setting Registers

The register are set by command data using the IFDI signal.

The first byte after the I2C address (= 32h) is a command, which differs for each register. The data

sent after that are fixed to two bytes. Both command and data are sent starting from the MSB in I2C

format.

The data loaded internally every two bytes. Note that commands or data that must be switched on

the SYNC signal, such as the RUN command or the IFF flag, must be synchronized with the SYNC

signal and loaded on that signal.

IFDI

IFCK

D11

D10

D13

D12

D15

D14

An: I

C ADDRESS

Cn: COMMAND

Dn: Data

(MCU

®)

start

32h

end

IFCK

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