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PLL520-10DI bảng dữ liệu(PDF) 3 Page - PhaseLink Corporation |
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PLL520-10DI bảng dữ liệu(HTML) 3 Page - PhaseLink Corporation |
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3 / 8 page ![]() PLL520-10 Low Phase Noise VCXO with multipliers (for 65-130MHz Fund Xtal) 47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 09/20/04 Page 3 3. Voltage Control Crystal Oscillator PARAMETERS SYMBOL CONDITIONS MIN. TYP. MAX. UNITS VCXO Stabilization Time * TVCXOSTB From power valid 10 ms VCXO Tuning Range FXIN = 100 – 200MHz; XTAL C0/C1 < 250 0V ≤ VCON ≤ 3.3V 200* ppm CLK output pullability VCON=1.65V, ±1.65V ±100* ppm On-chip Varicaps control range VCON = 0 to 3.3V 4 – 18* pF Linearity 10* % VCXO Tuning Characteristic 65 ppm/V VCON input impedance 60 k Ω VCON modulation BW 0V ≤ VCON ≤ 3.3V, -3dB 25 kHz Note: Parameters denoted with an asterisk (*) represent nominal characterization data and are not production tested to any specific limits. 4. General Electrical Specifications PARAMETERS SYMBOL CONDITIONS MIN. TYP. MAX. UNITS Supply Current (Loaded Outputs) IDD PECL/LVDS/CMOS 100/80/40 mA Operating Voltage VDD 2.97 3.63 V Output Clock Duty Cycle @ 50% VDD (CMOS) @ 1.25V (LVDS) @ VDD – 1.3V (PECL) 45 45 45 50 50 50 55 55 55 % Short Circuit Current ±50 mA 5. Jitter Specifications PARAMETERS CONDITIONS MIN. TYP. MAX. UNITS 77.76MHz 2.5 155.52MHz 4 Period jitter RMS 622.08MHz 5 ps 77.76MHz 24 155.52MHz 29 Period jitter peak-to-peak 622.08MHz 32 ps Integrated 12 kHz to 20 MHz at 77.76MHz 0.5 Integrated 12 kHz to 20 MHz at 155.52MHz 1.5 Integrated jitter RMS Integrated 12 kHz to 20 MHz at 622.08MHz 1.5 ps 6. Phase Noise Specifications PARAMETERS FREQUENCY @10Hz @100Hz @1kHz @10kHz @100kHz UNITS 77.76MHz -75 -95 -125 -145 -155 155.52MHz -75 -95 -120 -125 -123 Phase Noise relative to carrier 622.08MHz -75 -95 -115 -118 -115 dBc/Hz Note: Phase Noise at VCON = 0V |
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