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AT25SF081B bảng dữ liệu(PDF) 13 Page - Dialog Semiconductor

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Giải thích chi tiết về linh kiện  8-Mbit SPI Serial Flash Memory with Dual-I/O and Quad-I/O Support
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Datasheet
5-Aug-2021
DS-AT25SF081B-189
Revision E
13
© 2021 Dialog Semiconductor
8-Mbit SPI Serial Flash Memory
with Dual-I/O and Quad-I/O Support
AT25SF081B
Datasheet
6
Commands and Addressing
A valid instruction or operation must be started by asserting the CS pin. After that, the host controller must clock out a valid 8-bit
opcode on the SPI bus. Following the opcode, instruction-dependent information, such as address and data bytes, can be clocked
out by the host controller. All opcode, address, and data bytes are transferred with the most-significant bit (MSB) first. An operation
is ended by deasserting the CS pin.
Opcodes not supported by the AT25SF081B are ignored, and no operation is started. The device continues to ignore any data
presented on the SI pin until the start of the next operation (CS pin deasserted, then reasserted). If the CS pin is deasserted
before complete opcode and address information is sent to the device, the device simply returns to the idle state and waits for
the next operation.
Device addressing requires three bytes, representing address bits A23-A0, to be sent. Since the upper address limit of the
AT25SF081B memory array is 0FFFFFh, address bits A23-A20 are always ignored by the device.
Table 4: AT25SF081B Command Table
Command Name
Command
Opcode
Bus Transfer Type
(OP-AD-DA)(1)
Mode Bit
Present
Mode Bit
Clocks
Wait Cycle Dum-
my Clocks
# of Data
Bytes
System Commands
Enable Reset
66h
1-0-0
N
0
0
0
Reset Device
99h
1-0-0
N
0
0
0
Deep Power-down
B9h
1-0-0
N
0
0
0
Release Power-down
ABh
1-0-0
N
0
0
0
Read Commands
Normal Read Data
03h
1-1-1
N
0
0
1+
Fast Read
0Bh
1-1-1
N
0
8
1+
Dual Output Fast read
3Bh
1-1-2
N
0
8
1+
Dual I/O Fast read
BBh
1-2-2
Y
4
0
1+
Dual I/O Fast read (Continuous Mode)
BBh
0-2-2
Y
4
0
1+
Quad Output Fast read
6Bh
1-1-4
N
0
8
1+
Quad I/O Fast read
EBh
1-4-4
Y
2
4
1+
Quad I/O Fast read (Continuous
Mode)
EBh
0-4-4
Y
2
4
1+
Word Read Quad I/O
E7h
1-4-4
Y
2
2
1+
Word Read Quad I/O (Continuous
Mode)
E7h
0-4-4
Y
2
2
1+
Set Burst With Wrap
77h
1-0-4
N
0
6
1, D[6:4]
Write Commands
Write Enable
06h
1-0-0
N
0
0
0
Volatile SR Write Enable
50h
1-0-0
N
0
0
0
Write Disable
04h
1-0-0
N
0
0
0
Program Commands
Page Program
02h
1-1-1
N
0
0
1+
Quad Page Program
32h
1-1-4
N
0
0
1+



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