Preliminary for proposal

PLL602-42

Low Phase Noise CMOS XO (96MHz to 190MHz)

47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991

Rev 07/13/01 Page 1

FEATURES

• Low phase noise XO for the 96MHz to 190MHz

range (-133 dBc at 10kHz offset).

• CMOS output.

• 12 to 24MHz crystal input.

• Integrated crystal load capacitor: no external

load capacitor required.

• Low jitter (RMS): 3-6ps period, 7-10ps accum.

• 3.3V operation.

• Available in 8-Pin TSSOP or SOIC.

DESCRIPTIONS

The PLL602-42 is a low cost, high performance and

low phase noise XO, providing less than -133 dBc at

10kHz offset in the 96MHz to 190MHz operating

range. The very low jitter (3 to 6 ps RMS period jitter

and 6 to 10 ps RMS accumulated jitter) makes this

chip ideal for 155.52MHz SONET and SDH applica-

tions, and for 125MHz and 106.25MHz applications.

Input crystal can range from 12 to 24MHz (funda-

mental resonant mode).

PIN CONFIGURATION

OUTPUT RANGE

MULTIPLIERS

FREQUENCY

RANGE

OUTPUT

BUFFER

x8

96 - 190MHz

CMOS

BLOCK DIAGRAM

Reference

Divider

Phase

Comparator

Charge

Pump

Loop

Filter

VCO

VCO

Divider

XTAL

OSC

OE

XIN

XOUT

CLK

1

2

3

4

5

6

7

8

CLK

VDD

OE

XIN

GND

N/C

XOUT

GND