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AT25DF512C bảng dữ liệu(PDF) 31 Page - Dialog Semiconductor

tên linh kiện AT25DF512C
Giải thích chi tiết về linh kiện  512-Kbit, 1.65V Minimum SPI Serial Flash Memory with Dual-Read Support
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AT25DF512C
DS-25DF512C–030E–2/2017
ICC4
(2)(3)
Active Current,
Erase Operation
CS = VCC
12
18
12
18
mA
ILI
Input Load Current
All inputs at CMOS
levels
1
1
µA
ILO
Output Leakage
Current
All inputs at CMOS
levels
1
1
µA
VIL
Input Low Voltage
VCC x
0.2
VCC x
0.3
V
VIH
Input High Voltage
VCC x 0.8
VCC x 0.7
V
VOL
Output Low Voltage
IOL = 100µA
0.2
0.4
V
VOH
Output High
Voltage
IOH = -100µA
VCC -
0.2V
VCC -
0.2V
V
1.
Max. specification is 20µA @ 85°C.
2.
Typical values measured at 1.8V @ 25°C for the 1.65V to 3.6V range.
3.
Typical values measured at 3.0V @ 25°C for the 2.3V to 3.6V range.
Symbol
Parameter
Condition
1.65V to 3.6V
2.3V to 3.6V
Units
Min
Typ
Max
Min
Typ
Max
13.4 AC Characteristics - Maximum Clock Frequencies
Symbol
Parameter
1.65V to 3.6V
2.3V to 3.6V
Units
Min
Typ
Max
Min
Typ
Max
fCLK
Maximum Clock Frequency for All Operations
(including 0Bh opcode)
104
104
MHz
fRDLF
Maximum Clock Frequency for 03h Opcode
(Read Array – Low Frequency)
33
33
MHz
fRDDO
Maximum Clock Frequency for 3B Opcode
50
50
MHz
13.5 AC Characteristics – All Other Parameters
Symbol
Parameter
1.65V to 3.6V
2.3V to 3.6V
Units
Min
Typ
Max
Min
Typ
Max
tCLKH
Clock High Time
4
4
ns
tCLKL
Clock Low Time
4
4
ns
tCLKR
(1)
Clock Rise Time, Peak-to-Peak (Slew Rate)
0.1
0.1
V/ns
tCLKF(1)
Clock Fall Time, Peak-to-Peak (Slew Rate)
0.1
0.1
V/ns
tCSH
Chip Select High Time
35
25
ns
tCSLS
Chip Select Low Setup Time (relative to Clock)
6
6
ns
tCSLH
Chip Select Low Hold Time (relative to Clock)
6
6
ns



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