MPF7100BVBA3ES datasheet(29/125 Pages) NXP

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NXP Semiconductors

PF7100

7-channel power management integrated circuit for high performance applications

PF7100

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Product data sheet

Rev. 4 — 9 March 2021

29 / 125

14.6.2.1 Sequential power down

When the device is set to the sequential power down, it uses the same _SEQ[7:0]

registers as the power up sequence to power down in reverse order.

All regulators with the _SEQ[7:0] bits set to 0x00, power down immediately and the

remaining regulators power down one OTP_SEQ_TBASE[1:0] delay after, in reverse

order as defined in the _SEQ[7:0] bits.

If PGOOD pin is used as a GPO, it is de-asserted as part of the power down sequence

as indicated by the PGOOD_SEQ[7:0] bits.

If the MCU requires a different power down sequence, it can change the values of the

SEQ_TBASE[1:0] and the _SEQ[7:0] bits during the system-on states.

When the state machine passes through any of the OFF modes, the contents of the

SEQ_TBASE[1:0] and _SEQ[7:0] bits are reloaded with the corresponding mirror register

(OTP) values before it starts the next power up sequence.

14.6.2.2 Group power down

When the device is configured to power down in groups, the regulators are assigned to a

specific power down group. All regulators assigned to the same group are disabled at the

same time when the corresponding group is due to be disabled.

Power down groups shut down in decreasing order starting from the lowest hierarchy

group with a regulator shutting down (for instance, Group 4 being the lowest hierarchy

and Group 1 the highest hierarchy group). If no regulators are set to the lowest hierarchy

group, the power down sequence timer starts off the next available group that contains a

regulator to power down.

Each regulator has its own _PDGRP[1:0] bits to set the power down group it belongs to

as shown in Table 20.

Table 20. Power down regulator group bits

OTP_SWx_PDGRP[1:0]

OTP_LDOx_PDGRP[1:0]

OTP_PGOOD_PDGRP[1:0]

OTP_RESETBMCU_PDGRP[1:0]

SWx_PDGRP[1:0]

LDOx_PDGRP[1:0]

PGOOD_PDGRP[1:0]

RESETBMCU_PDGRP[1:0]

Description

Regulator belongs to Group 4

Regulator belongs to Group 3

Regulator belongs to Group 2

Regulator belongs to Group 1

If PGOOD pin is used as a GPO, the PGOOD_PDGRP[1:0] is used to turn off the

PGOOD pin in a specific group during the power down sequence. If PGOOD pin is used

in power good mode, it is recommended that the OTP_PGOOD_PDGRP bits are set to

11 to ensure that the group power down sequencer does not detect these bits as part of

Group 4.

Each one of power down groups have programmable time delay registers to set the time

delay after the regulators in this group have been turned off, and the next group can start

to power down.

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