FXLS8967AFR3 datasheet(54/98 Pages) NXP

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NXP Semiconductors

FXLS8967AF

3-Axis Low-g Accelerometer

Bit

Name

WAKE_IDLE[11:8]

Reset

Access

R/W

Table 62. WAKE_IDLE_MSB register (address 1Bh) bit allocation

15.18 SLEEP_IDLE_LSB register (address 1Ch)

Flexible Power Mode SLEEP idle time LSB. The contents of this register are only

meaningful when

SENS_CONFIG2[SLEEP_PM[1:0]] = 1xb. This register, along with

SLEEP_IDLE_MSB, sets the unsigned 12-bit SLEEP mode idle-time (off-time). The

counter time period is 312.5 µs/LSB, providing a range of 312.5 µs to 1.28 seconds. The

idle time + measurement time (set by the SLEEP mode decimation factor) forms the

measurement period (ODR–1).

Bit

Name

SLEEP_IDLE[7:0]

Reset

Access

R/W

Table 63. SLEEP_IDLE_LSB register (address 1Ch) bit allocation

15.19 SLEEP_IDLE_MSB register (address 1Dh)

Flexible Power Mode SLEEP idle time MSB (nibble). The contents of this register are

useful only when

SENS_CONFIG2[SLEEP_PM[1:0]] = 1xb.

Bit

Name

SLEEP_IDLE_TIME[11:8]

Reset

Access

R/W

Table 64. SLEEP_IDLE_MSB register (address 1Dh) bit allocation

15.20 ASLP_COUNT_LSB, ASLP_COUNT_MSB registers (addresses 1Eh to

1Fh)

The

ASLP_COUNT value sets the minimum number of ODR periods needed to transition

from WAKE to SLEEP mode when no event activity is detected. See Section 15.14 for

events that may be monitored for inactivity in order to trigger the transition to SLEEP

mode when the internal counter reaches the

ASLP_COUNT value.

The sleep counter period corresponds to the selected WAKE mode ODR period when

operating in LPM and HPM, and to the effective ODR set by the WAKE decimation

(measurement time) and WAKE idle time (off-time) settings when the device operates

in FPM. The auto-WAKE/SLEEP feature is only enabled when the value written to

ASLP_CNT is > 0.

SENS_CONFIG2[WAKE_PM] sets the WAKE power mode;

SENS_CONFIG3[WAKE_ODR] sets the ODR. When operating in Flexible Performance

Mode,

SENS_CONFIG3[WAKE_DEC] and WAKE_IDLE[11:0] values set the effective

ODR.

FXLS8967AF

All information provided in this document is subject to legal disclaimers.

Objective data sheet

Rev. 1 — 27 April 2021

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