AD7450ABRM datasheet(11/28 Pages) AD

tên linh kiện	AD7450ABRM

Giải thích chi tiết về linh kiện	Differential Input, 1 MSPS 10-Bit and 12-Bit ADCs in an 8-Lead SOT-23

PDF	28 Pages

Scroll/Zoom	100%

nhà sản xuất	AD [Analog Devices]

Trang chủ	http://www.analog.com

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11 / 28 page

AD7440/AD7450A

Rev. B | Page 11 of 28

Positive Gain Error

This is the deviation of the last code transition (011...110 to

011...111) from the ideal VIN+ – VIN– (i.e., +VREF − 1 LSB), after

the zero code error has been adjusted out.

Negative Gain Error

This is the deviation of the first code transition (100...000 to

100...001) from the ideal VIN+ − VIN– (i.e., –VREF + 1 LSB),

after the zero code error has been adjusted out.

Track-and-Hold Acquisition Time

The track-and-hold acquisition time is the minimum time

required for the track-and-hold amplifier to remain in track

mode for its output to reach and settle to within 0.5 LSB of the

applied input signal.

Power Supply Rejection Ratio (PSRR)

The power supply rejection ratio is the ratio of the power in

the ADC output at full-scale frequency, f, to the power of a

100 mV p-p sine wave applied to the ADC VDD supply of

frequency fS. The frequency of this input varies from 1 kHz to

1 MHz.

PSRR (dB) = 10log(Pf/PfS)

Pf is the power at frequency f in the ADC output; Pfs is the

power at frequency fS in the ADC output.

AD7450ABRM bảng dữ liệu(PDF) 11 Page - Analog Devices