LP3971 datasheet(18/42 Pages) NSC

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2C Register Definitions

2C CONTROL REGISTERS

Address

Name

Read/

Write

8h’02

ISR

Interrupt Status Register A

8h’07

SCR1

R/W

System Control Register 1

8h’0B

BBCC

R/W

Backup Battery Charger Control Register

8h’0E

SCR2

R/W

System Control Register 2

8h’10

BOVEN

R/W

Buck Output Voltage Enable Register

8h’11

BOVSR

Buck Output Voltage Status Register

8h’12

LDOEN

R/W

LDO Output Voltage Enable Register

8h’13

LDOVS

LDO Output Voltage Status Register

8h’20

VCC1

R/W

Voltage Change Control Register 1

8h’23

B1TV1

R/W

Buck 1 Target Voltage 1 Register

8h’24

B1TV2

R/W

Buck 1 Target Voltage 2 Register

8h’25

B1RC

R/W

Buck 1 Ramp Control

8h’29

B2TV1

R/W

Buck 2 Target Voltage 1 Register

8h’2A

B2TV2

R/W

Buck 2 Target Voltage 2 Register

8h’2B

B2RC

R/W

Buck 2 Voltage Ramp Control

8h’32

B3TV1

R/W

Buck 3 Target Voltage 1 Register

8h’33

B3TV2

R/W

Buck 3 Target Voltage 2 Register

8h’34

B3RC

R/W

Buck 3 Voltage Ramp Control

8h’38

BFR

R/W

Buck Function Register

8h’39

L21VCR

R/W

LDO2 & 1 Voltage Control Registers

8h’3A

L43VCR

R/W

LDO4 & LDO3 Voltage Control Registers

8h’3B

L5VCR

R/W

LDO5 Voltage Control Registers

INTERRUPT STATUS REGISTER (ISR) 8h’02

Bit

Designation

T100

T125

GPI2

GPI1

WU3L

WUPS

WUPT

WUPS

Reset Value

INTERRUPT STATUS REGISTER (ISR) 8h’02 DEFINITIONS

Bit

Access

Name

Description

Reserved

T125

Status bit for thermal warming PMIC T>125˚C

0 = PMIC Temp. <125˚C

1 = PMIC Temp. >125˚C

GPI2

Status bit for the input read in from GPIO 2 when set as Input

0 = GPI2 Logic Low

1 = GPI2 Logic High

GPI1

Status bit for the input read in from GPIO 1 when set as Input

0 = GPI1 Logic Low

1 = GPI1 Logic High

WU3L

PWR_ON Pin Long Pulse Wake Up Status

0=1No wake up event

1 = Long pulse wake up event

WUPS

PWR_ON Pin Short Pulse Wake Up Status

0 = No wake up event

1 = Short pulse wake up event

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