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M25P128 bảng dữ liệu(PDF) 17 Page - STMicroelectronics

tên linh kiện M25P128
Giải thích chi tiết về linh kiện  128 Mbit (Multilevel), Low Voltage, Serial Flash Memory With 50MHz SPI Bus Interface
PDF  41 Pages
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nhà sản xuất  STMICROELECTRONICS [STMicroelectronics]
Trang chủ  http://www.st.com
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M25P128 bảng dữ liệu(HTML) 17 Page - STMicroelectronics

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M25P128
Instructions
Rev. 1
17/41
6.1
Write Enable (WREN)
The Write Enable (WREN) instruction (Figure 8) sets the Write Enable Latch (WEL) bit.
The Write Enable Latch (WEL) bit must be set prior to every Page Program (PP), Sector
Erase (SE), Bulk Erase (BE) and Write Status Register (WRSR) instruction.
The Write Enable (WREN) instruction is entered by driving Chip Select (S) Low, sending the
instruction code, and then driving Chip Select (S) High.
Figure 8.
Write Enable (WREN) Instruction Sequence
6.2
Write Disable (WRDI)
The Write Disable (WRDI) instruction (Figure 9) resets the Write Enable Latch (WEL) bit.
The Write Disable (WRDI) instruction is entered by driving Chip Select (S) Low, sending the
instruction code, and then driving Chip Select (S) High.
The Write Enable Latch (WEL) bit is reset under the following conditions:
●
Power-up
●
Write Disable (WRDI) instruction completion
●
Write Status Register (WRSR) instruction completion
●
Page Program (PP) instruction completion
●
Sector Erase (SE) instruction completion
●
Bulk Erase (BE) instruction completion
Figure 9.
Write Disable (WRDI) Instruction Sequence
C
D
AI02281E
S
Q
2
1
34567
High Impedance
0
Instruction
C
D
AI03750D
S
Q
2
1
34567
High Impedance
0
Instruction



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