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MPC5602PEF0MLL4R bảng dữ liệu(PDF) 5 Page - NXP Semiconductors

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MPC5602P Microcontroller Data Sheet, Rev. 6
Freescale Semiconductor
5
Figure 1. MPC5602P block diagram
SRAM
(with ECC)
Slave
Slave
Slave
Code Flash
(with ECC)
Data Flash
(with ECC)
e200z0 Core
32-bit
general
purpose
registers
Special
purpose
registers
Integer
execution
unit
Exception
handler
Variable
length
encoded
instructions
Instruction
unit
Load/store
unit
Branch
prediction
unit
JTAG
1.2 V regulator
control
XOSC
16 MHz
RC oscillator
FMPLL_0
(System)
Nexus port
controller
Interrupt
controller
eDMA
16 channels
Master
Master
Instruction
32-bit
Master
Data
32-bit
Crossbar switch (XBAR, AMBA 2.0 v6 AHB)
Peripheral bridge
Legend:
ADC
Analog-to-digital converter
BAM
Boot assist module
CRC
Cyclic redundancy check
CTU
Cross triggering unit
DSPI
Deserial serial peripheral interface
ECSM
Error correction status module
eDMA
Enhanced direct memory access
eTimer
Enhanced timer
FCU
Fault collection unit
Flash
Flash memory
FlexCAN
Controller area network
FlexPWM Flexible pulse width modulation
FMPLL
Frequency-modulated phase-locked loop
INTC
Interrupt controller
JTAG
JTAG controller
LINFlex
Serial communication interface (LIN support)
MC_CGM Clock generation module
MC_ME
Mode entry module
MC_PCU Power control unit
MC_RGM Reset generation module
PIT
Periodic interrupt timer
SIUL
System Integration unit Lite
SRAM
Static random-access memory
SSCM
System status and configuration module
STM
System timer module
SWT
Software watchdog timer
WKPU
Wakeup unit
XOSC
External oscillator
XBAR
Crossbar switch
External ballast
Nexus 1
eDMA
16 channels



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