PI29FCT520/521T/2520T

MULTILEVEL PIPELINE REGISTERS

2

PS2002B 12/10/96

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Product Pin Description

Pin Name

Description

OE

Output Enable Input (Active LOW) for

3-State Output Port

CLK

Clock Input. Enter data into registers on

LOW-to-HIGH transistions

Instruction Inputs

Multiplexer Select. Inputs either register

A1, A2, B1, or B2 data to be avaialbe at the

output ports

Dx

Register Inputs

Yx

Register Outputs

GND

Ground

Power

Product Pin Configuration

CLK

GND

1

2

3

4

5

6

7

8

9

10

11

12

24

23

22

21

20

19

18

17

16

15

14

13

24-PIN

P24

Q24

R24

S24

S1

S0

Register

00

B2

01

B1

10

A2

11

A1

Register Selection

PI29FCT520/T2520T Data Loading

A1

A2

B1

B2

A1

A2

B1

B2

A1

A2

B1

B2

DUAL 2-LEVEL

SINGLE 4-LEVEL

I = 0

I = 1

I = 2

NOTE: I = 3 FOR HOLD

PI29FCT521T Data Loading

A1

A2

B1

B2

A1

A2

B1

B2

A1

A2

B1

B2

DUAL 2-LEVEL

SINGLE 4-LEVEL

I = 0

I = 1

I = 2

NOTE: I = 3 FOR HOLD

OE

FCT520.pm6

12/18/96, 4:44 PM

2