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74LCX74 bảng dữ liệu(PDF) 5 Page - STMicroelectronics

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Giải thích chi tiết về linh kiện  LOW VOLTAGE CMOS DUAL D-TYPE FLIP FLOP WITH 5V TOLERANT INPUTS
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nhà sản xuất  STMICROELECTRONICS [STMicroelectronics]
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AC ELECTRICAL CHARACTERISTICS
1) Skew is defined as the absolute value of the difference between the actual propagation delay for any two outputs of the same device switch-
ing in the same direction, either HIGH or LOW (tOSLH =| tPLHm -tPLHn|, tOSHL =| tPHLm -tPHLn|)
2) Parameter guaranteed by design
CAPACITIVE CHARACTERISTICS
1) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without
load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) =CPD xVCC xfIN +ICC/2 (per
Fli p-Flop)
Symbol
Parameter
Test Conditi on
Value
Unit
VCC
(V)
CL
(pF)
RL
(
Ω)
ts = tr
(ns)
-40 to 85
°C
-55 to 125
°C
Min.
Max.
Min.
Max.
tPLH tPHL
Propagation Delay
Time (CK to Q or Q)
2.7
50
500
2.5
1.5
8.0
1.5
9.2
ns
3.0 to 3.6
1.5
7.0
1.5
8.0
tPLH tPHL
Propagation Delay
Time (PR or CLR to
Qor Q)
2.7
50
500
2.5
1.5
8.0
1.5
9.2
ns
3.0 to 3.6
1.5
7.0
1.5
8.0
tS
Setup Time, HIGH or
LOW level D to CK
2.7
50
500
2.5
2.5
3.5
ns
3.0 to 3.6
2.5
3.5
th
Hold Time, HIGH or
LOW level D to CK
2.7
50
500
2.5
1.5
1.5
ns
3.0 to 3.6
1.5
1.5
tW
CK Pulse Width,
HIGH or LOW
PR or CLR Pulse
Width, LOW
2.7
50
500
2.5
3.0
4.0
ns
3.0 to 3.6
3.0
4.0
trec
Recovery Time PR
or CLR to CK
2.7
50
500
2.5
00
ns
3.0 to 3.6
0
0
fMAX
Clock Pulse
Frequency
2.7
50
500
2.5
150
150
MHz
tOSLH
tOSHL
Output To Output
Skew Time (note1,
2)
3.0 to 3.6
50
500
2.5
1.0
1.0
ns
Symbol
Parameter
Test Condition
Value
Unit
VCC
(V)
TA =25 °C
Min.
Typ.
Max.
CIN
Input Capacitance
3.3
VIN = 0 to VCC
6pF
CPD
Power Dissipation Capacitance
(note 1)
3.3
fIN = 10MHz
VIN = 0 or VCC
40
pF



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