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TLE94112ES bảng dữ liệu(PDF) 39 Page - Infineon Technologies AG

tên linh kiện TLE94112ES
Giải thích chi tiết về linh kiện  Twelve half bridge power outputs
PDF  80 Pages
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nhà sản xuất  INFINEON [Infineon Technologies AG]
Trang chủ  http://www.infineon.com
Logo INFINEON - Infineon Technologies AG

TLE94112ES bảng dữ liệu(HTML) 39 Page - Infineon Technologies AG

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Data Sheet
39
1.0
2020-09-29
TLE94112ES
Serial Peripheral Interface (SPI)
Figure 14 Setup time from EN rising edge to first SPI communication
Figure 15 SPI Data Timing
7.1.1
Global Error Flag
A logic OR combination between Global Error Flag (GEF) and the signal present on SDI is reported on SDO
between a CSN falling edge and the first SCLK rising edge (Figure 13). GEF is set if a fault condition is detected
or if the device comes from a Power On Reset (POR).
Note:
The SDI pin of all devices in daisy chain or non daisy chain mode must be Low at the beginning of the
SPI frame (between the CSN falling edge and the first SCLK rising edge).
It is possible to check if the TLE94112ES has detected a fault by reading the GEF without SPI clock pulse
(Figure 16).
EN
SPI
A) SPI message ignored
EN
SPI
B) SPI message accepted
tSET
CSN
SCLK
SDI
tlead
tCSNH
tlag
t
SCLKH
t
SCLKL
tpCLK
tSDI_hold
SDO
tVASDO
tENSDO
tDISSDO
0.8VDD
0.2VDD
0.8VDD
0.2VDD
0.8VDD
0.2VDD
0.8VDD
0.2VDD
tSDI_setup



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