ADRV9008-2WSLASHPCBZ datasheet(21/95 Pages) AD

21 / 95 page

Data Sheet

ADRV9008-2

Rev. 0 | Page 21 of 95

Pin No.

Type

Mnemonic

Description

Input

SYNCIN0−

JESD204B Receiver Channel 0 Data Link LVDS Input. This pin

forms the sync signal associated with observation receiver channel

data on the JESD204B interface. When unused, connect this

pin to GND with a pull-down resistor or directly to GND.

Input

SYNCIN0+

JESD204B Receiver Channel 0 Data Link LVDS Input. This pin

forms the sync signal associated with observation receiver channel

data on the JESD204B interface. When unused, connect this

pin to GND with a pull-down resistor or connect this pin

directly to GND.

Input

ORX1_ENABLE

Observation Receiver 1 Enable Pin. When unused, connect this

pin to GND with a pull-down resistor or connect this pin

directly to GND.

Input

TX1_ENABLE

Transmitter 1 Enable Pin. When unused, connect this pin to

GND with a pull-down resistor or connect this pin directly to

GND.

Input

ORX2_ENABLE

Observation Receiver 2 Enable Pin. When unused, connect this

pin to GND with a pull-down resistor or connect this pin

directly to GND.

Input

TX2_ENABLE

Transmitter 2 Enable Pin. When unused, connect this pin to

GND with a pull-down resistor or connect this pin directly to

GND.

M10

Input/

output

GPIO_17

Digital GPIO, 1.8 V to 2.5 V. Because this pin contains an input

stage, control the voltage on the pin. When unused, this pin

can be tied to ground through a resistor to safeguard against

misconfiguration, or the pin can be left floating, programmed as

an output, and driven low.

M11

Input/

output

GPIO_16

Digital GPIO, 1.8 V to 2.5 V. Because this pin contains an input

stage, control the voltage on the pin. When unused, this pin

can be tied to ground through a resistor to safeguard against

misconfiguration, or the pin can be left floating, programmed as

outputs, and driven low.

M12

Input

VDD_INTERFACE

Input/Output Interface Supply, 1.8 V to 2.5 V.

M13

Output

SYNCOUT0−

JESD204B Transmitter Channel Data Link LVDS Output. This pin

forms the sync signal associated with transmitter channel data on

the JESD204B interface. When unused, do not connect this pin.

M14

Output

SYNCOUT0+

JESD204B Transmitter Channel Data Link LVDS Output. This pin

forms the sync signal associated with transmitter channel data on

the JESD204B interface. When unused, do not connect this pin.

Input

VDDA1P3_CLOCK_VCO_LDO

1.3 V Separate Trace to Common Supply Point.

Output

SERDOUT3−

RF Current Mode Logic (CML) Differential Negative Output 3.

When unused, do not connect this pin.

Output

SERDOUT3+

RF CML Differential Positive Output 3. When unused, do not

connect this pin.

Output

SERDOUT2−

RF CML Differential Negative Output 2. When unused, do not

connect this pin.

Output

SERDOUT2+

RF CML Differential Positive Output 2. When unused, do not

connect this pin.

N8, P8

Input

VDDA1P3_SER

1.3 V Supply for JESD204B Serializer.

N9, P9

Input

VDDA1P3_DES

1.3 V Supply for JESD204B Deserializer.

N10

Input

SERDIN1−

RF CML Differential Negative Input 1. When unused, do not

connect this pin.

N11

Input

SERDIN1+

RF CML Differential Positive Input 1. When unused, do not

connect this pin.

N12

Input

SERDIN0−

RF CML Differential Negative Input 0. When unused, do not

connect this pin.

N13

Input

SERDIN0+

RF CML Differential Positive Input 0. When unused, do not

connect this pin.

Output

AUX_SYNTH_VTUNE

Auxiliary Synthesizer VTUNE Output.

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