ADL5369

Data Sheet

Rev. A | Page 6 of 23

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

VPMX

RFIN

RFCT

COMM

COMM

VGS1

VPSW

LOI2

VGS0

LOI1

14

13

12

1

3

4

15

11

2

5

NOTES

1. NIC = NOT INTERNALLY CONNECTED.

2. EXPOSED PAD MUST BE SOLDERED TO GROUND.

ADL5369

TOP VIEW

(Not to Scale)

Figure 2. Pin Configuration

Table 7. Pin Function Descriptions

Pin No.

Mnemonic

Description

1

VPMX

Positive Supply Voltage for the IF Amplifier.

2

RFIN

RF Input. This pin must be ac-coupled.

3

RFCT

RF Balun Center Tap (AC Ground).

4, 5, 16

COMM

Device Common (DC Ground).

6, 8

VLO3, VLO2

Positive Supply Voltages for LO Amplifier.

7

LGM3

LO Amplifier Bias Control.

9

LOSW

LO Switch. LOI1 is selected for 0 V, or LOI2 is selected for 3 V.

10

NIC

Not Internally Connected.

11, 15

LOI1, LOI2

LO Inputs. These pins must be ac-coupled.

12, 13

VGS0, VGS1

Mixer Gate Bias Controls (3 V Logic). Ground these pins for the nominal setting.

14

VPSW

Positive Supply Voltage for LO Switch.

17

PWDN

Power-Down. Connect this pin to ground for normal operation or connect this pin to 3.0 V for disable mode.

18, 19

IFON, IFOP

Differential IF Outputs.

20

VCMI

No Connect. This pin can be grounded.

EPAD (EP)

Exposed Pad. The exposed pad must be soldered to ground.