AD9699 datasheet(39/121 Pages) AD

39 / 121 page

Data Sheet

AD9699

DIGITAL DOWNCONVERTER (DDC)

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Rev. 0 | 39 of 121

FTW=round248modfC, fSfS (5)

where:

FTW is the 48-bit twos complement number representing the

NCO FTW.

fS is the ADC sampling frequency.

fC is the desired carrier frequency.

mod(x) is a remainder function. For example mod(110,100) = 10

and for negative numbers, mod(–32,10) = –2.

round(x) is a rounding function. For example round(3.6) = 4 and for

negative numbers, round(–3.4) = –3.

Note that Equation 5 applies to the aliasing of signals in the digital

domain (that is, aliasing introduced when digitizing analog signals).

The MAW must be set to zero to use coherent mode. When MAW is

zero, the programmable modulus logic is automatically disabled.

For example, if the ADC sampling frequency (fS) is 3000 MSPS and

the carrier frequency (fC) is 416.667 MHz, then,

NCO_FTW=round248mod416.667, 3000

3000

=0x2EC6_C03A_8E23

The actual carrier frequency can be calculated based on the follow-

ing equation:

fC_ACTUAL=FTW×fS248

For the previous example, the actual carrier frequency (fC_ACTUAL)

fC_ACTUAL=416.667×3000

248

=416.66699 MHz

A 48-bit POW is available for each NCO to create a known phase

relationship between multiple chips or individual DDC channels

inside the chip.

While in coherent mode, the FTW and POW registers can be

updated at any time while still maintaining deterministic phase

results in the NCO.

NCO Channel Selection

When configured in coherent mode, only one FTW is required in

the NCO. In this mode, the user can switch to any tuning frequency

without the need to reset the NCO by writing to the FTW directly.

However, for fast switching applications, where either all FTWs

are known beforehand or it is possible to queue up the next set

of FTWs, the NCO contains 16 additional shadow registers (see

Figure 84). These shadow registers are hereafter referred to as the

NCO channels.

Figure 85 shows a simplified block diagram of the NCO channel

selection block. The gray lines in Figure 85 represent SPI control

lines.

Figure 85. NCO Channel Selection Block

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