LP5910 datasheet(3/31 Pages) TI

3 / 31 page

5 Pin Configuration and Functions

OUT

GND

Figure 5-1. YKA Package, 4-Pin Ultra-Thin DSBGA,

Top View

OUT

GND

Figure 5-2. YKA Package, 4-Pin Ultra-Thin DSBGA,

Bottom View

OUT

GND

Figure 5-3. DRV Package, 6-Pin WSON With Thermal Pad, Top View

Table 5-1. Pin Functions

I/O

DESCRIPTION

NAME

DSBGA

WSON

Enable input; disables the regulator when logic low. Enables the regulator when logic

high. An internal 1-MΩ pull down resistor connects this input to ground.

GND

—

Common ground

Voltage supply input. A 1-μF capacitor must be connected at this input.

—

2, 3

—

No internal connection. Connect to ground or leave open.

OUT

Voltage output. A 1-µF low-ESR capacitor must be connected from this pin to the

GND pin. Connect this output to the load circuit.

Exposed Pad

—

Thermal Pad

—

The exposed thermal pad on the bottom of the package must be connected to a

copper area under the package on the PCB. Connect to ground potential or leave

floating. Do not connect to any potential other than the same ground potential seen at

device pin 5 (GND). See the Power Dissipation section for more information.

www.ti.com

LP5910

SNVSA91F – SEPTEMBER 2015 – REVISED APRIL 2021

Submit Document Feedback

Product Folder Links: LP5910

LP5910 bảng dữ liệu(PDF) 3 Page - Texas Instruments

LP5910 bảng dữ liệu(HTML) 3 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31

bảng dữ liệu tải về

Link URL