Advanced CMOS TTL Input – 74ACT04

Hex Inverter Gate with LSTTL compatible inputs in bare die form

Rev 1.1

08/03/21



Inputs directly accept TTL



Outputs directly interface CMOS, NMOS and TTL



Outputs Source/Sink 24 mA



Low Input Current: 1µA

Die Size (Unsawn)

1300 x 1450

51 x 57

µm

mils

Minimum Bond Pad Size

130 x 130

5.12 x 5.12

µm

mils

Die Thickness

350 (±20)

13.78 (±0.79)

µm

mils

Top Metal Composition

Al 1%Si 1.1µm

Back Metal Composition

N/A – Bare Si



Functionally compatible with bipolar 74LS04



Lower power alternative to bipolar logic.

Features:

Ordering Information

The 74ACT04 hex inverter gate is fabricated on a 1.5µm

advanced 5V CMOS process combining high speed

LSTTL performance with CMOS low power. The device

contains six independent inverters which perform the

Boolean function Y = Ᾱ. Internal circuitry comprises of

three stages and includes buffered output for high noise

immunity and stability. Inputs are directly compatible

with both standard TTL and CMOS outputs. All inputs

are protected against ESD and excess voltage

transients

Description

Die Dimensions in µm (mils)

The following part suffixes apply:

1300 (51)



No suffix - MIL-STD-883 /2010B Visual Inspection

For High Reliability versions of this product please see

54ACT04

Supply Formats:

Mechanical Specification



Default – Die in Waffle Pack (400 per tray capacity)



Sawn Wafer on Tape – On request



Unsawn Wafer – On request



Die Thickness <> 350µm(14 Mils) – On request



Assembled into Ceramic Package – On request

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