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MCP47FXBX4 bảng dữ liệu(PDF) 20 Page - Microchip Technology

tên linh kiện MCP47FXBX4
Giải thích chi tiết về linh kiện  8/10/12-Bit Quad/Octal Voltage Output, 6 LSb INL Digital-to-Analog Converters with I짼C Interface
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MCP47FXBX4/8
DS20006368A-page 20
 2020 Microchip Technology Inc.
TABLE 1-4:
I2C BUS START/STOP BITS AND LAT REQUIREMENTS
I2C AC Characteristics
Standard Operating Conditions (unless otherwise specified)
Operating Temperature: -40
C  T
A  +125C (Extended)
The operating voltage range is described in DC Characteristics.
Param.
No.
Sym.
Characteristic
Min.
Max.
Units
Conditions
—FSCL
Standard mode
0
100
kHz
Cb = 400 pF, 1.8V - 5.5V(2)
Fast mode
0
400
kHz
Cb = 400 pF, 2.7V - 5.5V
High-Speed 1.7
0
1.7
MHz Cb = 400 pF, 4.5V - 5.5V
High-Speed 3.4
0
3.4
MHz Cb = 100 pF, 4.5V - 5.5V
D102
Cb
Bus Capacitive
Loading
100 kHz mode
—
400
pF
400 kHz mode
—
400
pF
1.7 MHz mode
—
400
pF
3.4 MHz mode
—
100
pF
90
TSU:STA Start condition
Setup time
(only relevant for
repeated Start
condition)
100 kHz mode
4700
—
ns
Note 2
400 kHz mode
600
—
ns
1.7 MHz mode
160
—
ns
3.4 MHz mode
160
—
ns
91
THD:STA Start condition
Hold time
(after this period, the
first clock pulse is
generated)
100 kHz mode
4000
—
ns
Note 2
400 kHz mode
600
—
ns
1.7 MHz mode
160
—
ns
3.4 MHz mode
160
—
ns
92
TSU:STO Stop condition
Setup time
100 kHz mode
4000
—
ns
Note 2
400 kHz mode
600
—
ns
1.7 MHz mode
160
—
ns
3.4 MHz mode
160
—
ns
93
THD:STO Stop condition
Hold time
100 kHz mode
4000
—
ns
Note 2
400 kHz mode
600
—
ns
1.7 MHz mode
160
—
ns
3.4 MHz mode
160
—
ns
95
TLATHD
SCL ↑ to LAT↑ (write data ACK bit)
Hold Time
250
—
ns
Write data delayed(3)
96
TLAT
LAT High or Low time
50
—
ns
Note 2
Not Tested. This parameter is ensured by characterization.
Note 3
The transition of the LAT signal between 10 ns before the rising edge (Spec 94) and 250 ns after the rising
edge (Spec 95) of the SCL signal is indeterminate whether the change in VOUT is delayed or not.



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