MC56F81663VLC datasheet(47/73 Pages) NXP

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10.3.7 Capacitance attributes

Table 13. Capacitance attributes

Description

Symbol

Min.

Typ.

Max.

Unit

Input capacitance

CIN

—

Output capacitance

COUT

—

10.4 Switching specifications

10.4.1 Device clock specifications

Table 14. Device clock specifications

Symbol

Description

Min.

Max.

Unit

Notes

Normal run mode

fSYSCLK

Device (system and core) clock frequency

• using relaxation oscillator

• using external clock source

0.001

100

MHz

fBUS

Bus clock

—

MHz

10.4.2 General switching specifications

These general-purpose specifications apply to all signals configured for GPIO signals.

Table 15. General switching specifications

Description

Min.

Max.

Unit

Notes

GPIO pin interrupt pulse width (digital glitch filter disabled) —

Synchronous path

1.5

—

Bus clock

cycles

External RESET and NMI pin interrupt pulse width —

Asynchronous path

100

—

GPIO pin interrupt pulse width — Asynchronous path

—

Port rise and fall time

—

1. The synchronous and asynchronous timing must be met.

2. This is the shortest pulse that is guaranteed to be recognized.

3. 75 pF load

10.5 Thermal specifications

General

MC56F81xxx, Rev. 1.1, 12/2020

NXP Semiconductors

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