INA237 datasheet(21/45 Pages) TI

21 / 45 page

Table 7-3. INA237 Registers (continued)

Address Acronym

Section

SUVL

Shunt Undervoltage Threshold

BOVL

Bus Overvoltage Threshold

BUVL

Bus Undervoltage Threshold

10h

TEMP_LIMIT

Temperature Over-Limit

Threshold

11h

PWR_LIMIT

Power Over-Limit Threshold

3Eh

MANUFACTURER_ID

Manufacturer ID

Complex bit access types are encoded to fit into small table cells. Table 7-4 shows the codes that are used for

access types in this section.

Table 7-4. INA237 Access Type Codes

Access Type

Code

Description

Read Type

Read

Write Type

Write

Reset or Default Value

-n

Value after reset or the default

value

7.6.1.1 Configuration (CONFIG) Register (Address = 0h) [reset = 0h]

The CONFIG register is shown in Table 7-5.

Return to the Summary Table.

Table 7-5. CONFIG Register Field Descriptions

Bit

Field

Type

Reset

Description

RST

R/W

Reset Bit. Setting this bit to '1' generates a system reset that is the

same as power-on reset.

Resets all registers to default values.

0h = Normal Operation

1h = System Reset sets registers to default values

This bit self-clears.

RESERVED

R/W

Reserved. Always reads 0.

13-6

CONVDLY

R/W

Sets the Delay for initial ADC conversion in steps of 2 ms.

0h = 0 s

1h = 2 ms

FFh = 510 ms

RESERVED

R/W

Reserved. Always reads 0.

ADCRANGE

R/W

Shunt full scale range selection across IN+ and IN–.

0h = ±163.84 mV

1h = ± 40.96 mV

3-0

RESERVED

Reserved. Always reads 0.

www.ti.com

INA237

SBOSA20 – FEBRUARY 2021

Submit Document Feedback

Product Folder Links: INA237

INA237 bảng dữ liệu(PDF) 21 Page - Texas Instruments

INA237 bảng dữ liệu(HTML) 21 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45

bảng dữ liệu tải về

Link URL