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LTC7802EUFDM bảng dữ liệu(PDF) 20 Page - Analog Devices

tên linh kiện LTC7802EUFDM
Giải thích chi tiết về linh kiện  40V Low IQ, 3MHz Dual, 2-Phase Synchronous Step-Down Controller with Spread Spectrum
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LTC7802
20
Rev. 0
For more information www.analog.com
where f is the operating frequency, COUT is the output
capacitance and ΔIL is the ripple current in the inductor.
The output ripple is highest at maximum input voltage
since ΔIL increases with input voltage.
Setting the Output Voltage
The LTC7802 output voltages are each set by an external
feedback resistor divider carefully placed across the out-
put, as shown in Figure 4. The regulated output voltage
is determined by:
VOUT = 0.8V 1+
RB
RA
⎛
⎝⎜
⎞
⎠⎟
RUN Pins and Undervoltage Lockout
The two channels of the LTC7802 are enabled using
the RUN1, and RUN2 pins. The RUN pins have a rising
threshold of 1.2V with 100mV of hysteresis. Pulling a
RUN pin below 1.1V shuts down the main control loop
and resets the soft-start for that channel. Pulling both
RUN pins below 0.7V disables the controllers and most
internal circuits, including the INTVCC LDOs. In this state,
the LTC7802 draws only ≈1.5μA of quiescent current.
The RUN pins are high impedance and must be externally
pulled up/down or driven directly by logic. Each RUN pin
can tolerate up to 40V (absolute maximum), so it can be
conveniently tied to VIN in always-on applications where
the controller is enabled continuously and never shut
down. Do not float the RUN pins.
The RUN pins can also be configured as precise under-
voltage lockouts (UVLOs) on the input supply with a resis-
tor divider from VIN to ground, as shown in Figure 5.
The VIN UVLO thresholds can be computed as:
UVLO RISING = 1.2V 1
+
R1
R2
⎛
⎝⎜
⎞
⎠⎟
UVLO FALLING = 1.1V 1
+
R1
R2
⎛
⎝⎜
⎞
⎠⎟
The current that flows through the R1-R2 divider directly
adds to the shutdown, sleep, and active current of the
LTC7802, and care should be taken to minimize the
impact of this current on the overall efficiency of the
application circuit. Resistor values in the MΩ range may
be required to keep the impact on quiescent shutdown
and sleep currents low.
APPLICATIONS INFORMATION
Figure 4. Setting Output Voltage
7802 F04
1/2 LTC7802
VFB
RB
CFF
RA
VOUT
Figure 5. Using the RUN Pins As a UVLD
7802 F06
1/2 LTC7802
RUN
R1
R2
VIN
Place resistors RA and RB very close to the VFB pin to
minimize PCB trace length and noise on the sensitive VFB
node. Great care should be taken to route the VFB trace
away from noise sources, such as the inductor or the
SW trace. To improve frequency response, a feedforward
capacitor (CFF) may be used.
For applications with multiple output voltage levels, select
channel 1 to be the lowest output voltage that is greater
than 3.2V. When the SENSE1– pin (connected to VOUT1)
is above 3.2V, it biases some internal circuitry instead of
VIN, thereby increasing light load Burst Mode efficiency.
Similarly, connect EXTVCC to the lowest output voltage
that is greater than the 4.8V maximum EXTVCC rising
switch-over threshold. EXTVCC then supplies the high
current gate drivers and relieves additional quiescent
current from VIN, further reducing the VIN pin current to
≈1μA in sleep.



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