MCP3302/04

DS21697B-page 4

 2002 Microchip Technology Inc.

Dynamic Performance

Total Harmonic Distortion

THD

—

-91

—

dB

Note 3

Signal to Noise and Distortion

SINAD

—

78

—

dB

Note 3

Spurious Free Dynamic Range

SFDR

—

92

—

dB

Note 3

Common Mode Rejection

CMRR

—

79

—

dB

Note 6

Channel to Channel Crosstalk

CT

—

> -110

—

dB

Note 6

Power Supply Rejection

PSR

—

74

—

dB

Note 4

Reference Input

Voltage Range

0.4

—

V

Note 2

Current Drain

—

—

100

0.001

150

3

µA

Analog Inputs

Full Scale Input Span

CH0 - CH7

V

Absolute Input Voltage

CH0 - CH7

-0.3

—

V

Leakage Current

—

0.001

±1

µA

Switch Resistance

—1

—

k

Ω

See Figure 6-3

Sample Capacitor

—

25

—

pF

See Figure 6-3

Digital Input/Output

Data Coding Format

Binary Two’s Complement

High Level Input Voltage

——

V

Low Level Input Voltage

——

V

High Level Output Voltage

4.1

—

—

V

Low Level Output Voltage

——

0.4

V

Input Leakage Current

-10

—

10

Output Leakage Current

-10

—

10

Pin Capacitance

——

10

pF

ELECTRICAL SPECIFICATIONS (CONTINUED)

input configuration (Figure 3-4) with fixed common mode voltage of 2.5V. All parameters apply over temperature with

Parameter

Symbol

Min

Typ

Max

Units

Conditions

Note 1: This specification is established by characterization and not 100% tested.

5: Maximum clock frequency specification must be met.

7: TSSOP devices are only specified at 25°C and +85°C.

8: For slow sample rates, see Section 6.2.1 for limitations on clock frequency.