TMP47C101 datasheet(18/32 Pages) TOSHIBA

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TOSHIBA CORPORATION

TMP47C101/201

Example 1: To enable IOVF1, INT1, and INT2 interrupts.

A,#0101B

; EIR

←0101

XCH

A,EIR

EICLR

IL,111111B

; EIF

←1

Example 2: To set the EIF to “1”, and to clear the inter-

rupt latches except ITMR to “0”.

EICLR

IL,000010B

; EIF

←1, IL

0←0, IL2-

IL5←0

2.8.2 Interrupt Processing

An interrupt request is held until the interrupt is accepted or the

IL is cleared by the reset of the interrupt latch operation

instruction.The interrupt acknowledge processing is performed

in 2 instruction cycles after the end of the current instruction

execution (or after the timer/counter processing if any). The

interrupt service program terminates upon execution of the

interrupt return instruction [RETI].

The interrupt acknowledge processing consists of the fol-

lowing sequence:

The contents of the program counter and the flags are

saved on the stack.

The interrupt entry address corresponding to the inter-

rupt source is set to the program counter.

The status flag is set to “1”.

The EIF is cleared to “0”, temporarily disabling the ac-

ceptance of subsequent interrupts.

The interrupt latch for the accepted interrupt source is

cleared to “0”.

The instruction stored at the interrupt entry address is

executed. (Generally, in the program memory space at

the interrupt entry address, the branch instruction to

each interrupt processing program is stored.)

Figure 2-22. Interrupt Timing Chart (Example)

To perform the multi-interrupt, the EIF is set to “1” in the

interrupt service program, and the acceptable interrupt

source is selected by the EIR. However, for the INT1 interrupt,

the interrupt service is disabled under software control be-

cause it is not disabled by the EIR.

Example: The INT1 interrupt service is disabled under

software control (Bit 0 of RAM [05H] are as-

signed to the disabling switch of interrupt ser-

vice).

PINT1:

TEST

05H,0

; Skips if RAM [05H] 0

is “1”

SINT1

RET1

SINT1:

The Interrupt return instruction [RETI] performs the follow-

ing operations:

Restores the contents of the program counter and the

flags from the stack.

Sets the EIF to “1” to provide the interrupt enable state

again.

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