F159V datasheet(13/78 Pages) RENESAS

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May 15, 2020

F159V Datasheet

Table 8.

Electrical Characteristics (Cont.)

See the F159V Typical Application Circuit. Operated as a dual-path transmitter, VDD = +3.3V, Internal fLO = 2050MHz to generate fRF = 2000MHz,

LO_SW_OUT= +4dBm setting, TEP = +25°C, maximum gain setting, all Enable pins = GND, BB_IQ frequency = 49MHz or 50MHz, I leads Q

by 90 degrees, BB_I&Q levels = 100mVp-p each tone differential, I and Q = 0.325V common-mode bias, ZBB_DIFF = 110Ω, ZRFO = 50Ω,

parameters measured at RF output, Evaluation Board (EVKit) traces and connectors are de-embedded, unless otherwise stated.

Parameter

Symbol

Condition

Minimum Typical Maximum Units

Modulator Stage

Modulator power coupled output

PM_OUT

BB input = 210mVp-p differential

Modulator output

Maximum VVA & DSA attenuation

-31 [a]

-28

dBm

P1dB at Modulator coupled output

OP1dBM_OUT Maximum VVA & DSA attenuation

-9

-6

dBm

IP3 at Modulator coupled output

OIP3M_OUT

BB input = 210mVp-p differential per

tone

Maximum VVA & DSA attenuation

10.7

dBm

fLO ± 2*fBB Rejection

2BBREJ_CPL

fBB ≤ 100MHz

Mod output coupled node

BB input = 210mVp-p differential

Maximum VVA & DSA attenuation

-82

-50

dBc

fLO ± 3*fBB Rejection

3BBREJ_CPL

fBB ≤ 100MHz

Mod output coupled node

BB input = 210mVp-p differential

Maximum VVA & DSA attenuation

-80

-50

dBc

fLO ± 5*fBB Rejection

5BBREJ_CPL

FBB ≤ 100MHz

Mod output coupled node

BB input = 210mVp-p differential

Maximum VVA & DSA attenuation

-96

dBc

Turn-on time

PON

Enable = LOW to HIGH. Power is within

0.05dB of final power

0.6

µs

Turn off time

POFF

Enable = HIGH to LOW. Power

is -30dBc from initial output power

0.1

µs

Cascaded VGA

Turn-on time

PON

Enable = LOW to HIGH. Power is within

0.05dB of final power

0.8

µs

Turn off time

POFF

Enable = HIGH to LOW. Power

is -30dBc from initial output power

0.1

µs

[a] Specifications in the minimum/maximum columns that are shown in bold italics are guaranteed by test. Specifications in these

columns that are not shown in bold italics are guaranteed by design characterization.

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