TMP139AIYAHR datasheet(44/58 Pages) TI

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7.6.19 MR35: Temperature Sensor Critical Temperature Low Limit-High Byte Configuration (address =

23h) [reset = 00h]

The status flag for critical temperature low limit is set when the result of the temperature conversion is less than

the programmed value in the MR35 and MR34 registers. The application must ensure that the critical

temperature low limit registers must have a value lesser than the temperature low limit registers.

Return to Register Map.

Figure 7-65. MR35: Temperature Sensor Critical Temperature Low Limit-High Byte Configuration Register

TS_CRIT_LOW_LIMIT_HIGH[7:0]

R-0

RW-00h

Table 7-31. MR35: Temperature Sensor Critical Temperature Low Limit-High Byte Field Descriptions

Bit

Field

Type

Reset

Description

7:0

TS_CRIT_LOW_LIMIT_HIGH[7:0]

00h

High byte of the critical low limit temperature for the thermal

sensor.1

MR35 and MR34 together define the critical low limit

temperature for the thermal sensor.

1. The bits marked as R-0, shall not be updated when host writes 1 and shall read as 0.

7.6.20 MR48: Device Status (address = 30h) [reset = 00h]

The MR48 register provides the status of the IBI when the TMP139 is in I3C mode.

Return to Register Map.

Figure 7-66. MR48: Device Status Register

IBI_STATUS

Reserved

R-0

R-00h

Table 7-32. MR48: Device Status Field Descriptions

Bit

Field

Type

Reset

Description

IBI_STATUS

Device event In Band Interrupt (IBI) status.

0 = No pending IBI.

1 = Pending IBI.

6:0

Reserved

00h

Reserved

7.6.21 MR49: Current Sensed Temperature Low Byte (address = 31h) [reset = 00h]

The MR49 register, stores the lower 8-bits of the temperature output from the most recent conversion.

Return to Register Map.

Figure 7-67. MR49: Current Sensed Temperature Low Byte Register

TS_SENSE_LOW[7:0]

R-00h

TMP139

SNIS217 – DECEMBER 2020

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