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ZSSC3138BA2R bảng dữ liệu(PDF) 14 Page - Renesas Technology Corp |
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ZSSC3138BA2R bảng dữ liệu(HTML) 14 Page - Renesas Technology Corp |
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14 / 26 page ![]() ZSSC3138 Datasheet © 2016 Integrated Device Technology, Inc. 14 January 25, 2016 Figure 2.2 Measurement Cycle with 1 Bridge Sensor Signal Measurement per Special Measurement CTAZ CT BRAZ BR BR BR BRAZ BR CTAZ CT BR BR CMV SSCP SSCN 12 Measurements per Cycle Measurement Cycle Measurement Cycle with Bridge Signal Output CFGAPP:BRCNT = 0 (1 bridge sensor signal measurement per special measurement) Startup BR Bridge Sensor Measurement BRAZ Bridge Sensor Auto-Zero Measurement CT Calibration Temperature Measurement CTAZ Calibration Temperature Auto-Zero Measurement Bridge Sensor Signal Main Signals Measurement Measurement Cycle Phases Analog Output Updated SSCP Sensor Short Check Positive-Biased Measurement SSCN Sensor Short Check Negative-Biased Measurement CMV Sensor Common Mode Voltage Measurement Safety Functions Measurement * * Not available for all ZSSC313x products. See Table 1.1 in the ZSSC313x Functional Description. 2.3.4. Analog-to-Digital Converter The A/D converter is implemented using full-differential switched-capacitor technique. • Programmable ADC resolutions are r ADC=<13, 14>bit. The ZSSC3138 supports <15, 16>bit resolution with range zooming. The A/D conversion is integrating, inherently monotone, and insensitive to short and long term instability of the clock frequency. The conversion time tADC depends on the desired resolution and can be roughly calculated by equation (1): = 2 f 2 t OSC r ADC ADC (1) Where rADC Resolution of A/D conversion fOSC Frequency of internal oscillator (refer to 1.3.1) |
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