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STM32WLE4JCU6TR bảng dữ liệu(PDF) 18 Page - STMicroelectronics

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Giải thích chi tiết về linh kiện  Multiprotocol LPWAN 32-bit Arm® Cortex®-M4 MCUs, LoRa®, (G)FSK, (G)MSK, BPSK, up to 256KB Flash, 64KB SRAM
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STM32WLE4JCU6TR bảng dữ liệu(HTML) 18 Page - STMicroelectronics

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Functional overview
STM32WLE5/E4xx
18/145
DS13105 Rev 8
3.6
Security management
The devices contain many security blocks, such as:
•
RNG
•
AES: 128-and 256-bit AES, supporting ECB, CBC, CTR, GCM, GMAC and CCM
chaining modes
•
PKA:
–
modular arithmetic including exponentiation with maximum modulo size of
3136 bits
–
elliptic curves over prime field scalar multiplication, ECDSA signature, ECDSA
verification with maximum modulo size of 521 bits
•
cyclic redundancy check calculation unit (CRC)
3.7
Boot modes
At startup, BOOT0 pin and BOOT1 option bit are used to select one of the following boot
options:
•
Boot from user Flash memory
•
Boot from boot system memory (where embedded bootloader is located)
•
Boot from embedded SRAM
The bootloader makes possible to download code from USART or SPI.
3.8
Sub-GHz radio
3.8.1
Introduction
The sub-GHz radio is an ultra-low-power sub-GHz radio operating in the 150 - 960 MHz ISM
band. LoRa, (G)FSK/(G)MSK modulation in transmit and receive, and (D)BPSK in transmit
only, allow an optimal trade-off between range, data rate and power consumption. This sub-
GHz radio is compliant with the LoRaWAN® specification v1.0 and radio regulations such as
ETSI EN 300 220, EN 300 113, EN 301 166, FCC CFR 47 part 15, 24, 90, 101 and the ARIB
STD-T30, T-67, T-108.
The sub-GHz radio consists of:
•
an analog front-end transceiver, capable of outputting up to + 15 dBm maximum power
on its RFO_LP pin and up to + 22 dBm maximum power on RFO_HP pin
•
a digital modem bank providing the following modulation schemes:
–
LoRa Rx/Tx with bandwidth (BW) from 7.8 - 500 kHz, spreading factor (SF)
5 - 12, bit rate (BR) from 0.013 to 17.4 Kbit/s (real bitrate)
–
FSK and GFSK Rx/Tx with BR from 0.6 to 300 Kbit/s
–
(G)MSK Tx with BR from 0 to 10 Kbit/s
–
BPSK and DBPSK TX only with bitrate for 100 and 600 bit/s
•
a digital control including all data processing and sub-GHz radio configuration control
•
a high-speed clock generation



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