STM32F334C4U6TR datasheet(83/125 Pages) STMICROELECTRONICS

83 / 125 page

DS9994 Rev 9

83/125

STM32F334x4 STM32F334x6 STM32F334x8

Electrical characteristics

103

Table 55. HRTIM output response to fault protection(1)

Symbol

Parameter

Conditions

Min.

Typ.

Max.(2)

Unit

tLAT(DF)

Digital fault response

latency

Propagation delay from

HRTIM1_FLTx digital input to

HRTIM_CHxy output pin

-12

tW(FLT)

Minimum Fault pulse

width

12.5

tLAT(AF)

Analog fault response

latency

Propagation delay from comparator

COMPx_INP input pin to

HRTIM_CHxy output pin

-25

1. Refer to Fault paragraph in HRTIM section of RM0364.

2. Data based on characterization results, not tested in production.

Table 56. HRTIM output response to external events 1 to 5 (Low-Latency mode(1))

Symbol

Parameter

Conditions

Min.

Typ.

Max.(2)

Unit

tLAT(DEEV)

Digital external event

response latency

Propagation delay from

HRTIM1_EEVx digital input to

HRTIM_CHxy output pin (30pF

load)

-12

tW(FLT)

Minimum external event

pulse width

-12.5

tLAT(AEEV)

Analog external event

response latency

Propagation delay from comparator

COMPx_INP input pin to

HRTIM_CHxy output pin (30pF

load)

-25

TJIT(EEV)

External event response

jitter

Jitter of the delay from

HRTIM1_EEVx digital input or

COMPx_INP input pin to

HRTIM_CHxy output pin

tHRTIM(3)

TJIT(PW)

Jitter on output pulse

width in response to an

external event

tHRTIM(3)

1. EExFAST bit in HRTIM_EECR1 register is set (Low Latency mode). This functionality is available on external events

channels 1 to 5. Refer to Latency to external events paragraph in HRTIM section of RM0364.

2. Data based on characterization results, not tested in production.

3. THRTIM = 1 / fHRTIM with fHRTIM= 144 MHz or fHRTIM = 128 MHZ depending on the clock controller configuration. (Refer to

Reset and clock control section in RM0364.)

Table 57. HRTIM output response to external events 1 to 10 (Synchronous mode (1))

Symbol

Parameter

Conditions

Min. Typ. Max.(2)

Unit

TPROP(HRTIM)

External event response

latency in HRTIM

HRTIM internal propagation delay (3)

tHRTIM

tLAT(DEEV)

Digital external event

response latency

Propagation delay from HRTIM1_EEVx

digital input to HRTIM_CHxy output pin

(30pF load) (4)

-61

STM32F334C4U6TR bảng dữ liệu(PDF) 83 Page - STMicroelectronics

STM32F334C4U6TR bảng dữ liệu(HTML) 83 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

bảng dữ liệu tải về

Link URL