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BLUENRG-345VC bảng dữ liệu(PDF) 20 Page - STMicroelectronics |
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BLUENRG-345VC bảng dữ liệu(HTML) 20 Page - STMicroelectronics |
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20 / 72 page ![]() • Half-duplex single wire communication • Local interconnection network (LIN) master/slave capability • Smart card mode, ISO 7816 compliant protocol • IrDA (infrared data association) SIR ENDEC specifications • Modem operations (CTS/RTS) • RS485 driver enable • Multiprocessor communications • SPI-like communication capability High speed data communication is possible by using DMA (direct memory access) for multibuffer configuration. 1.21 LPUART LPUART is a UART which allows bidirectional UART communications. It supports half-duplex single wire communications and modem operations (CTS/RTS). It also supports multiprocessor communications. DMA (direct memory access) can be used for data transmission/reception. 1.22 Serial peripheral interface (SPI) The BlueNRG-LP has three SPI interfaces (SPI1, SPI2, SPI3) allowing communication up to 32 Mbit/s in both master and slave modes. The SPI peripheral supports: • Master or slave operation • Multimaster support • Full-duplex synchronous transfers on three lines • Half-duplex synchronous transfer on two lines (with bidirectional data line) • Simplex synchronous transfers on two lines (with unidirectional data line) • Serial communication with external devices • NSS management by hardware or software for both master and slave: dynamic change of master/slave operations • SPI Motorola support • SPI TI mode support • Hardware CRC feature for reliable communication All SPI interfaces can be served by the DMA controller. 1.23 Inter-IC sound (I2S) The BlueNRG-LP SPI interfaces: SPI2 and SPI3 support the I2S protocol. The I2S interface can operate in slave or master mode with full duplex and half-duplex communication. It can address four different audio standards: • Philips I2S standard • MSB-justified standards (left-justified) • LSB-justified standards (right-justified) • PCM standard. The I2S interfaces DMA capability for transmission and reception. 1.24 Serial wire debug port The BlueNRG-LP embeds an ARM SWD interface that allows interactive debugging and programming of the device. The interface is composed of only two pins: SWDIO and SWCLK. The enhanced debugging features for developers allow up to 4 breakpoints and up to 2 watchpoints. 1.25 TX and RX event alert The BlueNRG-LP is provided with the TX_SEQUENCE and RX_SEQUENCE signals which alert, respectively, transmission and reception activities. A signal can be enabled for TX and RX on two pins, through alternate functions: BlueNRG-LP LPUART DS13282 - Rev 2 page 20/72 |
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