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R5F52107ADFN bảng dữ liệu(PDF) 14 Page - Renesas Technology Corp |
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R5F52107ADFN bảng dữ liệu(HTML) 14 Page - Renesas Technology Corp |
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14 / 223 page ![]() R01DS0041EJ0150 Rev.1.50 Page 14 of 221 Oct 18, 2013 RX210 Group 1. Overview 1.4 Pin Functions Table 1.8 lists the pin functions. Table 1.8 Pin Functions (1 / 4) Classifications Pin Name I/O Description Power supply VCC Input Power supply pin. Connect it to the system power supply. VCL — Connect this pin to the VSS pin via the 0.1 μF smoothing capacitor used to stabilize the internal power supply. Place the capacitor close to the pin. VSS Input Ground pin. Connect it to the system power supply (0 V). Clock XTAL Output Pins for connecting a crystal resonator. An external clock signal can be input through the EXTAL pin. EXTAL Input BCLK Output Outputs the external bus clock for external devices. XCIN Input Input/output pins for the sub-clock oscillator. Connect a crystal resonator between XCIN and XCOUT. XCOUT Output Operating mode control MD Input Pin for setting the operating mode. The signal levels on this pin must not be changed during operation. System control RES# Input Reset pin. This LSI enters the reset state when this signal goes low. CAC CACREF Input Input pin for the clock frequency accuracy measurement circuit. On-chip emulator FINED I/O FINE interface pin. Address bus A0 to A23 Output Output pins for the address. Data bus D0 to D15 I/O Input and output pins for the bidirectional data bus. Multiplexed bus A0/D0 to A15/D15 I/O Address/data multiplexed bus Bus control RD# Output Strobe signal which indicates that reading from the external bus interface space is in progress. WR# Output Strobe signal which indicates that writing to the external bus interface space is in progress, in single-write strobe mode. WR0#, WR1# Output Strobe signals which indicate that either group of data bus pins (D7 to D0, and D15 to D8) is valid in writing to the external bus interface space, in byte strobe mode. BC0#, BC1# Output Strobe signals which indicate that either group of data bus pins (D7 to D0 and D15 to D8) is valid in access to the external bus interface space, in single-write strobe mode. CS0# to CS3# Output Select signals for areas 0 to 3. WAIT# Input Input pin for wait request signals in access to the external space. ALE Output Address latch signal when address/data multiplexed bus is selected. Interrupt NMI Input Non-maskable interrupt request pin. IRQ0 to IRQ7 Input Interrupt request pins. |
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