TDA10046HT

Single-chip DVB-T channel

decoder

Delivering a low cost system solution for DVB-T channel

decoding, the TDA10046HT single chip channel decoder

demonstrates Philips Semiconductors’ continuing leader-

ship in digital broadcast reception, offering advanced features

such as adaptive echo cancellation, fast channel scanning and

a unique ‘Pulse Killer’ algorithm that reduces impulsive noise

disturbances.

S e m i c o n d u c t o r s

The TDA10046HT performs all DVB-T channel decoding functions

from IF input to transport stream output, using an internal DSP core for

synchronization and control.Thanks to its sharp adjacent channel digital

ilter, this single-chip receiver achieves excellent performance with low

cost tuners (one SAW only). It requires only a low cost crystal oscillator

(4 MHz) as a clock source, which can be shared with the tuner.

After

sampling of the 1st or 2nd IF by a 10-bit ADC, the signal is converted to

baseband and passes through the FFT demodulator. Channel frequency

response is then estimated and iltered in both time and frequency

domains, and used to equalize the signal.

A common phase error

correction handles tuner phase noise.

The TDA10046HT implements a number of advanced features including a

high-performance ‘Pulse Killer’ algorithm to reduce the disturbing effects

Key features

of short and strong impulsive noise interference caused by electrical

domestic devices and/or car trafic. For maximum ease of use, the

• 2K and 8K COFDM demodulator, fully ETS 300-744 compliant

2

TDA10046HT features fully automatic transmission parameters detection,

• TPS and Cell Identiier I

C-bus readable

ultra fast scan of the whole UHF/VHF band, and fast zapping facilities.

• 2nd or 1st IF analog input

• On chip 10-bit ADC and PLL

Evaluation boards are available with most commercial tuners.They are

• Single or dual AGC loop (with programmable takeover point)

provided with all the necessary software including a tailored Graphical

• Adjacent channel digital iltering (only one external SAW ilter is required)

User Interface (GUI) that allows easy evaluation and development.

• Automatic frequency offset detection (±1, 2 or 3 standard offsets)

• Dynamic FFT window positioning, and adaptive echo equalization

• Consolidated algorithm for impulsive noise reduction

• DSP based synchronization enables on the ly irmware upgrades

• No extra-host software required

• Fast UHF/VHF band scanning

• Simultaneous tri-state parallel and serial Transport Stream interfaces

modulator

Applications

• I

• Integrated Digital TV (iDTV)

• 5V tolerant I/O pins

• Set-Top-Boxes (STB)

• Low power consumption (450mW)

• Personal Video Recorder (PVR) with DVB-T reception

• TQFP64 package, CMOS 0.18 µm technology

• Digital TV PCI card for Personal Computers