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ST7LITE35 bảng dữ liệu(PDF) 60 Page - STMicroelectronics

tên linh kiện ST7LITE35
Giải thích chi tiết về linh kiện  8-BIT MCU WITH SINGLE VOLTAGE FLASH, DATA EEPROM, ADC, TIMERS, SPI, LINSCI
PDF  167 Pages
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nhà sản xuất  STMICROELECTRONICS [STMicroelectronics]
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ST7LITE35 bảng dữ liệu(HTML) 60 Page - STMicroelectronics

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DUAL 12-BIT AUTORELOAD TIMER 3 (Cont’d)
11.2.3.2 Output Compare Mode
To use this function, load a 12-bit value in the
Preload DCRxH and DCRxL registers.
When the 12-bit upcounter (CNTR1) reaches the
value stored in the Active DCRxH and DCRxL reg-
isters, the CMPFx bit in the PWMxCSR register is
set and an interrupt request is generated if the
CMPIE bit is set.
The output compare function is always performed
on CNTR1 in both Single Timer mode and Dual
Timer mode, and never on CNTR2. The difference
is that in Single Timer mode the counter 1 can be
compared with any of the four DCR registers, and
in Dual Timer mode, counter 1 is compared with
DCR0 or DCR1.
Notes:
1. The output compare function is only available
for DCRx values other than 0 (reset value).
2. Duty cycle registers are buffered internally. The
CPU writes in Preload Duty Cycle Registers and
these values are transferred in Active Duty Cycle
Registers after an overflow event if the corre-
sponding transfer bit (TRAN1 bit) is set. Output
compare is done by comparing these active DCRx
values with the counter.
Figure 40. Block Diagram of Output Compare Mode (single timer)
DCRx
OUTPUT COMPARE CIRCUIT
COUNTER 1
(ATCSR)
CMPIE
PRELOAD DUTY CYCLE REGx
ACTIVE DUTY CYCLE REGx
CNTR1
TRAN1
(ATCSR2)
OVF
(ATCSR)
CMPFx (PWMxCSR)
CMP
REQUEST
INTERRUPT
1



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