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THP210 bảng dữ liệu(PDF) 29 Page - Texas Instruments

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tên linh kiện THP210
Giải thích chi tiết về linh kiện  THP210 Ultra-Low Offset, High-Voltage, Low-Noise, Precision, Fully-Differential Amplifier
PDF  41 Pages
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THP210 bảng dữ liệu(HTML) 29 Page - Texas Instruments

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9.2.2 ADS891x With Single-Ended RC Filter Stage
The application circuit in Figure 9-12 shows the schematic of a complete reference driver circuit that generates a
full-scale range of 4.5 V at the ADC using a unipolar supply voltage of 5 V. This circuit is used to measure the
driving capability of the THP210 with the different variants of the ADS891x ADC.
To test the complete dynamic range of the circuit, the common-mode voltage VOCM of the input of the ADC is
established at a value of VREF / 2. To exclude distortion caused by reference voltage VREF and common-mode
voltage VOCM of the ADC, the test circuit uses the low-noise OPA2625 in an inverting gain configuration for V
OCM, and the high-precision, low-noise REF5050 for VREF. See the ADS8910BEVM-PDK user's guide for more
details.
AINN
AINP
ADS891x
+
±
VOCM = 2.25 V
THP210
+VS
VOD
R1 = 1k (0.1%)
R2 = 1k (0.1%)
R3 = 1k (0.1%)
R5 = 100 (1%)
C5 = 1 nF
C6 = 1 nF
R5 = 100 (1%)
R4 = 1k (0.1%)
C4 = 100 pF
C2 = 100 pF
VID
+
VREF = 4.5 V
+
±
+VS
5 V
+VS
Circuit driving capability:
x
ADS8910B at 800 kSPS
x
ADS8912B at 500 kSPS
x
ADS8914B at 250 kSPS
Figure 9-12. Driving ADS891x With Single-Ended RC Filter Stage
9.2.2.1 Design Requirements
The requirements for this application are:
• Differential to differential conversion
• Unipolar supply voltage of 5 V
• Full-scale range of ADC of FSR = ±4.5 V
• Input signal amplitude of VREF –0.4 dB
• Driver configuration in unity-gain buffer configuration (1-V/V gain)
• Circuit bandwidth f(–3dB) = 935 kHz
• Output RC elements set by SAR input requirements
www.ti.com
THP210
SBOS932B – FEBRUARY 2020 – REVISED OCTOBER 2020
Copyright © 2020 Texas Instruments Incorporated
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