Silicom Ltd. Connectivity Solutions

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SHA-256/384/512



200Mbps Random Number Generator per processor

Host Interface:



Support PCI Express Base Specification 2.0 (5 GTs)



PCI Express x8 lanes

Applications:



VPN appliances



VPN firewalls, routers and switches



Secure WEB Servers and storage



Secure Access devices

Technical Specifications

System Throughout Per Processor (Per Processor)

System Throughout values are shown below. System values represent measured, memory-to-memory, in-system throughout on an

optional platform using large buffer sizes and maximum pipelining per chip

Function

Value

Full SSL processing throughout

AES+SHA

2500 Mbp/s (per chip)

Full IPSec AES/SHA

2500 Mbp/s (per chip)

MAX Diffie-Helman (1024-bit module,

180-bit exponent)

32000 Transaction /Second (per chip)

MAX RSA 1024-bit exponent with CRT

17000 Transaction /Second (per chip)

Random Number Generator

200 Mbps (per chip)

Operating Systems Support

Operating system support:

Linux

General Technical Specifications

Interface Standard:

PCI-Express Base Specification Revision 2.0 ( 5 GTs)